369 research outputs found

    A reconfigurable frame interpolation hardware architecture for high definition video

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    Since Frame Rate Up-Conversion (FRC) is started to be used in recent consumer electronics products like High Definition TV, real-time and low cost implementation of FRC algorithms has become very important. Therefore, in this paper, we propose a low cost hardware architecture for realtime implementation of frame interpolation algorithms. The proposed hardware architecture is reconfigurable and it allows adaptive selection of frame interpolation algorithms for each Macroblock. The proposed hardware architecture is implemented in VHDL and mapped to a low cost Xilinx XC3SD1800A-4 FPGA device. The implementation results show that the proposed hardware can run at 101 MHz on this FPGA and consumes 32 BRAMs and 15384 slices

    A Review Paper on Video De-Interlacing Multiple Techniques

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    In this paper present video interlacing de-interlacing and various techniques. Focus on the different techniques of video De- Interlacing that are Intra Field, Inter Field, Motion Adaptive, Motion Compensated De- interlacing and Spatio-Temporal Interpolation. De- Interlaced video use the full resolution of each scan so produced high quality image and remove flicker problem. Techniques are work on the scan line of object Intra Field techniques use pixels of the moving object, Inter Field works on stationary regions of object, Motion Adaptive works on the edge of the Object and Motion Compensation focus video sequence and brightness variation. Advantage of using De-interlacing technique is: Better Moving object image, no flickers and high vertical resolution

    Dynamically variable step search motion estimation algorithm and a dynamically reconfigurable hardware for its implementation

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    Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. For the recently available High Definition (HD) video formats, the computational complexity of De full search (FS) ME algorithm is prohibitively high, whereas the PSNR obtained by fast search ME algorithms is low. Therefore, ill this paper, we present Dynamically Variable Step Search (DVSS) ME algorithm for Processing high definition video formats and a dynamically reconfigurable hardware efficiently implementing DVSS algorithm. The architecture for efficiently implementing DVSS algorithm. The simulation results showed that DVSS algorithm performs very close to FS algorithm by searching much fewer search locations than FS algorithm and it outperforms successful past search ME algorithms by searching more search locations than these algorithms. The proposed hardware is implemented in VHDL and is capable, of processing high definition video formats in real time. Therefore, it can be used in consumer electronics products for video compression, frame rate up-conversion and de-interlacing(1)

    Fuzzy motion adaptive algorithm for video de-interlacing

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    A motion adaptive algorithm for video de-interlacing is presented in this paper. It is based on a fuzzy inference system, which performs an interpolation between two linear techniques as a function of the motion level. Fuzzy systems with different number of ¿if-then¿ rules have been analyzed and compared in terms of complexity as well as efficiency in de-interlacing benchmark video sequences.Ministerio de Educación y Ciencia TEC2005-04359/MICJunta de Andalucía TIC2006-63

    Adaptive deinterlacing of video sequences using motion data

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    In this work an efficient motion adaptive deinterlacing method with considerable improvement in picture quality is proposed. A temporal deinterlacing method has a high performance in static images while a spatial method has a better performance in dynamic parts. In the proposed deinterlacing method, a motion adaptive interpolator combines the results of a spatial method and a temporal method based on motion activity level of video sequence. A high performance and low complexity algorithm for motion detection is introduced. This algorithm uses five consecutive interlaced video fields for motion detection. It is able to capture a wide range of motions from slow to fast. The algorithm benefits from a hierarchal structure. It starts with detecting motion in large partitions of a given field. Depending on the detected motion activity level for that partition, the motion detection algorithm might recursively be applied to sub-blocks of the original partition. Two different low pass filters are used during the motion detection to increase the algorithm accuracy. The result of motion detection is then used in the proposed motion adaptive interpolator. The performance of the proposed deinterlacing algorithm is compared to previous methods in the literature. Experimenting with several standard video sequences, the method proposed in this work shows excellent results for motion detection and deinterlacing performance

    Video post processing architectures

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    Soft computing techniques for video de-interlacing

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    This paper presents the application of soft computing techniques to video processing. Specially, the research work has been focused on de-interlacing task. It is necessary whenever the transmission standard uses an interlaced format but the receiver requires a progressive scanning, as happens in consumer displays such as LCDs and plasma. A simple hierarchical solution that combines three simple fuzzy logicbased constituents (interpolators) is presented in this paper. Each interpolator specialized in one of three key image features for de-interlacing: motion, edges, and possible repetition of picture areas. The resulting algorithm offers better results than others with less or similar computational cost. A very interesting result is that our algorithm is competitive with motion-compensated algorithm

    Tuning of a hierarchical fuzzy system for video de-interlacing

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    The tuning of hierarchical fuzzy systems are not supported by the majority of CAD tools available at the market currently. The xfsl tool integrated into Xfuzzy 3 allows the tuning of complex fuzzy systems, for instance, hierarchical systems with modules in cascade. The authors propose the use of this tool for tuning a complex fuzzy system for video deinterlacing in this paper. The parameters obtained after tuning are proven by de-interlacing a wide battery of sequences. The use of tuning techniques improves the quality of de-interlacing and provides an algorithm simplification that facilitates its hardware implementatio
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