2 research outputs found
Test-Delivery Optimization in Manycore SOCs
We present two test-data delivery optimization algorithms
for system-on-chip (SOC) designs with hundreds of cores,
where a network-on-chip (NOC) is used as the interconnection
fabric. We first present an e ective algorithm based on a subsetsum
formulation to solve the test-delivery problem in NOCs
with arbitrary topology that use dedicated routing. We further
propose an algorithm for the important class of NOCs with grid
topology and XY routing. The proposed algorithm is the first to
co-optimize the number of access points, access-point locations,
pin distribution to access points, and assignment of cores to access
points for optimal test resource utilization of such NOCs. Testtime
minimization is modeled as an NOC partitioning problem
and solved with dynamic programming in polynomial time. Both
the proposed methods yield high-quality results and are scalable
to large SOCs with many cores. We present results on synthetic
grid topology NOC-based SOCs constructed using cores from
the ITC’02 benchmark, and demonstrate the scalability of our
approach for two SOCs of the future, one with nearly 1,000 cores
and the other with 1,600 cores. Test scheduling under power
constraints is also incorporated in the optimization framework