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1 research outputs found
A systolic memory architecture for fast codebook design based on MMPDCL algorithm
Author
Egawa R.
Nakamura T.
+3 more
Sano K.
Suzuki K.
Takagi C.
Publication venue
'Institute of Electrical and Electronics Engineers (IEEE)'
Publication date
21/04/2010
Field of study
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科研費報告書収録論文(課題番号:14380132・基盤研究(B)(2)・14~16/研究代表者:小林, 広明/3次元グラフィックス用インテリジェントメモリーアーキテクチャに関する研究
Tohoku University Repository (TOUR) / 東北大学機関リポジトリ
Institutional Repositories DataBase (IRDB)