4 research outputs found

    How accurately do Java profilers predict runtime performance bottlenecks?

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    Determination of correct operation and behaviour of a structured amorphous surface

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    A recurring theme in intelligent environments is the intelligent surface composed of nanoscale processing units (smart dust). Such a surface (iSurface) can be considered an amorphous computer composed of a large array of identical processing units (iCells) each with its own sensor/effectors. An important requirement of such a surface is the need for a fast, reliable method to determine iCell operation, performance and code integrity. Any practical solution must fulfil certain criteria. First the impact on intercellular data communication bandwidth must be kept to a minimum, this is particularly important in high density, high speed iSurface applications such as high resolution video display. Previous work on processor profiling offered a possible solution in the form of metrics derived from profiling. This thesis describes a method developed to create long (>=32 bit) stable, robust metrics using a profiling technique that represents the current operational state of an iCell and thus enabling the quick exchange of diagnostics between iCells along with data traffic. Key requirements in the development of this system were fast acquisition of diagnostic variables, minimal affect on normal operation and the possibility of a hardware implementation which could be completely non intrusive in operation. The hardware developed fulfilled all these criteria in particular a novel method to create a stable metric that could determine compromised or incorrectly loaded code was developed. The metric of code integrity had both attributes of stability and responsiveness to change, something that has proven difficult to attain before. The uniqueness of the metrics produced by the hardware was also investigated and was determined to be very good and metric bit length was efficiently used. Impact on processor performance was also deemed acceptable at 2.31% and the developed architecture could theoretically be implemented in ‘system on chip’ (SOC) with zero processor overheads

    A Randomized Sampling Clock for CPU Utilization Estimation and Code Profiling

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    The unix rusage statistics are well known to be highly inaccurate measurements of CPU utilization. We have observed errors in real applications as large as 80%, and we show how to construct an adversary process that can use an arbitrary amount of the CPU without being charged. We demonstrate that these inaccuracies result from aliasing effects between the periodic system clock and periodic process behavior. Process behavior cannot be changed but periodic sampling can. To eliminate aliasing, we have introduced a randomized, aperiodic sampling clock into the 4.4bsd kernel. Our measurements show that this randomization has completely removed the systematic errors. 1 Introduction Traditional implementations of the Unix operating system provide coarse grained, statistical measurements of CPU utilization. On each tick of the system clock, the CPU state is examined. If the processor is in user mode, the current process is charged with one sampling interval of user time. Similarly, if the pr..
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