A Versatile workbench simulator: Five-phase inverter and PMa-SynRM performance evaluation

© 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.Thispaperpresents the design and structure of aversatileworkbench simulator forevaluating the performance of a five-phase inverter andPermanent Magnet assisted Synchronous Reluctance Motor(PMa-SynRM). The simulatorallows for adding variations tothe modulationtechniques, changingthe inverter structure’s semiconductordevice, and calculatingtheinverter’spower losses. Itcanalso facilitate observingthe current, voltage,andthe jointtemperature ofthe semiconductors devices. Furthermore,wecanobtain a perform that is close to anactualPMa-SynRM, dependingon the desired conditionsof speed and torque. The workbench simulator wasdevelopedby combining three software: Matlab/Simulink, PLECSand Altair Flux.Postprint (author's final draft

Modeling and identification of power electronic converters

Nowadays, many industries are moving towards more electrical systems and components. This is done with the purpose of enhancing the efficiency of their systems while being environmentally friendlier and sustainable. Therefore, the development of power electronic systems is one of the most important points of this transition. Many manufacturers have improved their equipment and processes in order to satisfy the new necessities of the industries (aircraft, automotive, aerospace, telecommunication, etc.). For the particular case of the More Electric Aircraft (MEA), there are several power converters, inverters and filters that are usually acquired from different manufacturers. These are switched mode power converters that feed multiple loads, being a critical element in the transmission systems. In some cases, these manufacturers do not provide the sufficient information regarding the functionality of the devices such as DC/DC power converters, rectifiers, inverters or filters. Consequently, there is the need to model and identify the performance of these components to allow the aforementioned industries to develop models for the design stage, for predictive maintenance, for detecting possible failures modes, and to have a better control over the electrical system. Thus, the main objective of this thesis is to develop models that are able to describe the behavior of power electronic converters, whose parameters and/or topology are unknown. The algorithms must be replicable and they should work in other types of converters that are used in the power electronics field. The thesis is divided in two main cores, which are the parameter identification for white-box models and the black-box modeling of power electronics devices. The proposed approaches are based on optimization algorithms and deep learning techniques that use non-intrusive measurements to obtain a set of parameters or generate a model, respectively. In both cases, the algorithms are trained and tested using real data gathered from converters used in aircrafts and electric vehicles. This thesis also presents how the proposed methodologies can be applied to more complex power systems and for prognostics tasks. Concluding, this thesis aims to provide algorithms that allow industries to obtain realistic and accurate models of the components that they are using in their electrical systems.En la actualidad, el uso de sistemas y componentes eléctricos complejos se extiende a múltiples sectores industriales. Esto se hace con el propósito de mejorar su eficiencia y, en consecuencia, ser más sostenibles y amigables con el medio ambiente. Por tanto, el desarrollo de sistemas electrónicos de potencia es uno de los puntos más importantes de esta transición. Muchos fabricantes han mejorado sus equipos y procesos para satisfacer las nuevas necesidades de las industrias (aeronáutica, automotriz, aeroespacial, telecomunicaciones, etc.). Para el caso particular de los aviones más eléctricos (MEA, por sus siglas en inglés), existen varios convertidores de potencia, inversores y filtros que suelen adquirirse a diferentes fabricantes. Se trata de convertidores de potencia de modo conmutado que alimentan múltiples cargas, siendo un elemento crítico en los sistemas de transmisión. En algunos casos, estos fabricantes no proporcionan la información suficiente sobre la funcionalidad de los dispositivos como convertidores de potencia DC-DC, rectificadores, inversores o filtros. En consecuencia, existe la necesidad de modelar e identificar el desempeño de estos componentes para permitir que las industrias mencionadas desarrollan modelos para la etapa de diseño, para el mantenimiento predictivo, para la detección de posibles modos de fallas y para tener un mejor control del sistema eléctrico. Así, el principal objetivo de esta tesis es desarrollar modelos que sean capaces de describir el comportamiento de un convertidor de potencia, cuyos parámetros y/o topología se desconocen. Los algoritmos deben ser replicables y deben funcionar en otro tipo de convertidores que se utilizan en el campo de la electrónica de potencia. La tesis se divide en dos núcleos principales, que son la identificación de parámetros de los convertidores y el modelado de caja negra (black-box) de dispositivos electrónicos de potencia. Los enfoques propuestos se basan en algoritmos de optimización y técnicas de aprendizaje profundo que utilizan mediciones no intrusivas de las tensiones y corrientes de los convertidores para obtener un conjunto de parámetros o generar un modelo, respectivamente. En ambos casos, los algoritmos se entrenan y prueban utilizando datos reales recopilados de convertidores utilizados en aviones y vehículos eléctricos. Esta tesis también presenta cómo las metodologías propuestas se pueden aplicar a sistemas eléctricos más complejos y para tareas de diagnóstico. En conclusión, esta tesis tiene como objetivo proporcionar algoritmos que permitan a las industrias obtener modelos realistas y precisos de los componentes que están utilizando en sus sistemas eléctricos.Postprint (published version

Analysis And Simulation Tools For Solar Array Power Systems

This dissertation presents simulation tools developed specifically for the design of solar array power systems. Contributions are made in several aspects of the system design phases, including solar source modeling, system simulation, and controller verification. A tool to automate the study of solar array configurations using general purpose circuit simulators has been developed based on the modeling of individual solar cells. Hierarchical structure of solar cell elements, including semiconductor properties, allows simulation of electrical properties as well as the evaluation of the impact of environmental conditions. A second developed tool provides a co-simulation platform with the capability to verify the performance of an actual digital controller implemented in programmable hardware such as a DSP processor, while the entire solar array including the DC-DC power converter is modeled in software algorithms running on a computer. This virtual plant allows developing and debugging code for the digital controller, and also to improve the control algorithm. One important task in solar arrays is to track the maximum power point on the array in order to maximize the power that can be delivered. Digital controllers implemented with programmable processors are particularly attractive for this task because sophisticated tracking algorithms can be implemented and revised when needed to optimize their performance. The proposed co-simulation tools are thus very valuable in developing and optimizing the control algorithm, before the system is built. Examples that demonstrate the effectiveness of the proposed methodologies are presented. The proposed simulation tools are also valuable in the design of multi-channel arrays. In the specific system that we have designed and tested, the control algorithm is implemented on a single digital signal processor. In each of the channels the maximum power point is tracked individually. In the prototype we built, off-the-shelf commercial DC-DC converters were utilized. At the end, the overall performance of the entire system was evaluated using solar array simulators capable of simulating various I-V characteristics, and also by using an electronic load. Experimental results are presented

Integrated design of high performance pulsed power converters : application to klystron modulators for the compact linear colider (CLIC)

Ce travail de recherche présente l’étude, conception et validation d’une topologie de convertisseur de puissance pulsé qui compense la chute de tension pour des modulateurs de type klystron de haute performance. Cette topologie est capable de compenser la chute de tension du banc de condensateur principal et, en même temps, de faire fonctionner le modulateur avec une consommation de puissance constante par rapport au réseau électrique. Ces spécifications sont requises par le projet Compact Linear Collider (CLIC) pour les modulateurs klystron de son Drive Beam. Le dimensionnement du système est effectué à partir d’un outil d’optimisation globale développé à partir des modèles analytiques qui décrivent les performances de chaque composant du système. Tous les modèles sont intégrés dans un processus optimal intermédiaire de conception qui utilise des techniques d’optimisation afin de réaliser un dimensionnement optimal du système. Les performances de cette solution optimale intermédiaire sont alors évaluées à l’aide d’un modèle plus fin basé sur des simulations numériques. Une technique d’optimisation utilisant l’approche «space mapping» est alors mise en oeuvre. Si l’écart entre les performances prédites et les performances simulées est important, des facteurs de correction sont appliqués aux modèles analytiques et le processus d’optimisation est relancé. Cette méthode permet d’obtenir une solution optimale validée par le modèle fin en réduisant le nombre de simulations. La topologie finale sélectionnée pour le cahier des charges du modulateur CLIC est validée expérimentalement sur des prototypes à échelle réduite. Les résultats valident la méthodologie de dimensionnement et respectent les spécifications.This research work presents the study, design and validation of a pulsed power converter topology that performs accurate voltage droop compensation for high performance klystron modulators. This topology is capable of compensating the voltage droop of the intermediate capacitor bank and, at the same time, it makes possible a constant power consumption operation of the modulator from the utility grid. These two main specifications are required for the Compact Linear Collider (CLIC) Drive Beam klystron modulators. The dimensioning of the system is performed by developing a global optimization design tool. This tool is first based on developed analytical models describing the performances of each system subcomponent. All these models are integrated into an intermediate design environment that uses nonlinear optimization techniques to calculate an optimal dimensioning of the system. The intermediate optimal solution performances are then evaluated using a more accurate model based on numerical simulation. Therefore, an optimization technique using «space mapping» is implemented. If differences between predicted performances and simulated results are non-negligible, correction factors are applied to the analytical models and the optimization process is launched again. This method makes possible to achieve an optimal solution validated by numerical simulation while reducing the number of numerical simulation steps. The selected final topology for the CLIC klystron modulator is experimentally validated using reduced scale prototypes. Results validate the selected methodology and fulfill the specifications

Design of a 14-bit fully differential discrete time delta-sigma modulator

Analog to digital converters play an essential role in modern mixed signal circuit design. Conventional Nyquist-rate converters require analog components that are precise and highly immune to noise and interference. In contrast, oversampling converters can be implemented using simple and high-tolerance analog components. Moreover, sampling at high frequency eliminates the need for abrupt cutoffs in the analog anti-aliasing filters. A noise shaping technique is also used in DS converters in addition to oversampling to achieve a high resolution conversion. A significant advantage of the method is that analog signals are converted using simple and high-tolerance analog circuits, usually a 1-bit comparator, and analog signal processing circuits having a precision that is usually much less than the resolution of the overall converter. In this thesis, a technique to design the discrete time DS converters for 25 kHz baseband signal bandwidth will be described. The noise shaping is achieved using a switched capacitor low-pass integrator around the 1-bit quantizer loop. A latched-type comparator is used as the quantizer of the DS converter. A second order DS modulator is implemented in a TSMC 0.35 µm CMOS technology using a 3.3 V power supply. The peak signal-to-noise ratio (SNR) simulated is 87 dB; the SNDR simulated is 82 dB which corresponds to a resolution of 14 bits. The total static power dissipation is 6.6 mW

Measurements, Models, Systems and Design

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Laboratory implementations of PMSM drive in hybrid electric vehicles applications

Field Programmable Gate Arrays (FPGAs) are one of the today\u27s most successful technologies for developing systems that require real time operation and providing additional flexibility to the designer. This research is focused on developing a control board for a permanent magnet synchronous machine (PMSM) using an FPGA module. The board is configured for individual use of an FPGA, digital signal processor (DSP) or in combination to control the PMSM by generating the required Pulse Width Modulator (PWM) to the inverter in order to drive and control the speed of the PMSM. Since, the exact rotor position and speed are required to control the motor; a useful method is developed digitally and implemented in the FPGA hardware module. The speed observer (SO), in which the Hall effect signals were used to calculate the speed and the angle of the rotor. In this thesis, three different techniques of PWM generation were developed and combined with rotor position and speed method. The project is implemented in Altera FPGA using Quartus II software V11.0 with VHDL as the supporting language. The design achieved high performance and accuracy of the detection estimation and control scheme for the Permanent Magnet Synchronous Machine. Error and design analysis has been done also --Abstract, page iii

Quantization noise analysis of a closed-loop PWM controller that includes Σ-Δ modulation

Σ-Δ modulation is a popular noise shaping technique which is used to move the quantization noise out of the frequency band of interest. Recently, a number of authors have applied this technique to a pulse width modulation (PWM) controller for switching power converters. However, previous analysis has not incorporated the effects of analog-to-digital converter (ADC) resolution or feedback control on the Σ-Δ modulator. In this work, quantization due to ADC resolution and PWM resolution are analyzed, considering the effects of noise-shaping and feedback. A number of simulations have been performed to explore the impact of various design choices on output noise. The study variables included the order of the Σ-Δ modulator, resolution of ADC, resolution of DPWM, the plant and the compensator. The theoretical model developed is used to generate the expected system Power Spectral Density (PSD) curves for each design choice and simulations techniques are used to validate the analysis. Experimental analysis has been performed on a digital voltage-mode control (VMC) synchronous buck converter and the output voltage PSD curves are generated using the welch method and compared with the theoretical and the simulation results. The experimental PSD curves for the 1st-order modulator match the simulation and theoretical PSD curves. This suggests that the theoretical model is a useful approximation and similar methods can be used to analyze the contribution of the quantizers to the output noise of a closed-loop controller system --Abstract, page iii

Digital Pulse Width Modulator Techniques For Dc - Dc Converters

Recent research activities focused on improving the steady-state as well as the dynamic behavior of DC-DC converters for proper system performance, by proposing different design methods and control approaches with growing tendency to using digital implementation over analog practices. Because of the rapid advancement in semiconductors and microprocessor industry, digital control grew in popularity among PWM converters and is taking over analog techniques due to availability of fast speed microprocessors, flexibility and immunity to noise and environmental variations. Furthermore, increased interest in Field Programmable Gate Arrays (FPGA) makes it a convenient design platform for digitally controlled converters. The objective of this research is to propose new digital control schemes, aiming to improve the steady-state and transient responses of a high switching frequency FPGA-based digitally controlled DC-DC converters. The target is to achieve enhanced performance in terms of tight regulation with minimum power consumption and high efficiency at steady-state, as well as shorter settling time with optimal over- and undershoots during transients. The main task is to develop new and innovative digital PWM techniques in order to achieve: 1. Tight regulation at steady-state: by proposing high resolution DPWM architecture, based on Digital Clock Management (DCM) resources available on FPGA boards. The proposed architecture Window-Masked Segmented Digital Clock Manager-FPGA based Digital Pulse Width Modulator Technique, is designed to achieve high resolution operating at high switching frequencies with minimum power consumption. 2. Enhanced dynamic response: by applying a shift to the basic saw-tooth DPWM signal, in order to benefit from the best linearity and simplest architecture offered by the conventional counter-comparator DPWM. This proposed control scheme will help the compensator reach the steady-state value faster. Dynamically Shifted Ramp Digital Control Technique for Improved Transient Response in DC-DC Converters, is projected to enhance the transient response by dynamically controlling the ramp signal of the DPWM unit