Modelling and simulation of advanced semiconductor devices

This paper presents a modelling and simulation study of advanced semiconductor devices. Different Technology Computer Aided Design approaches and models, used in nowadays research are described here. Our discussions are based on numerous theoretical approaches starting from first principle methods and continuing with discussions based on more well stablished methods such as Drift-Diffusion, Monte Carlo and Non-Equilibrium Green’s Function formalism

Advanced modeling of nanoscale devices for analog applications

L'abstract è presente nell'allegato / the abstract is in the attachmen

Multi-dimensional modeling and simulation of semiconductor nanophotonic devices

Self-consistent modeling and multi-dimensional simulation of semiconductor nanophotonic devices is an important tool in the development of future integrated light sources and quantum devices. Simulations can guide important technological decisions by revealing performance bottlenecks in new device concepts, contribute to their understanding and help to theoretically explore their optimization potential. The efficient implementation of multi-dimensional numerical simulations for computer-aided design tasks requires sophisticated numerical methods and modeling techniques. We review recent advances in device-scale modeling of quantum dot based single-photon sources and laser diodes by self-consistently coupling the optical Maxwell equations with semiclassical carrier transport models using semi-classical and fully quantum mechanical descriptions of the optically active region, respectively. For the simulation of realistic devices with complex, multi-dimensional geometries, we have developed a novel hp-adaptive finite element approach for the optical Maxwell equations, using mixed meshes adapted to the multi-scale properties of the photonic structures. For electrically driven devices, we introduced novel discretization and parameter-embedding techniques to solve the drift-diffusion system for strongly degenerate semiconductors at cryogenic temperature. Our methodical advances are demonstrated on various applications, including vertical-cavity surface-emitting lasers, grating couplers and single-photon sources

Monte Carlo simulation of pn-junctions

The Monte Carlo method is a widely used and acknowledged method for semiconductor device simulations. We have developed a Monte Carlo device simulator for CdHgTe devices and obtained the device characteristics for two components, a pn-diode and an avalanche photodiode (APD). We have investigated some weaknesses of the Monte Carlo method when applied to pn-junction devices

Optical and transport properties of GaN and its lattice matched alloys

The study of carrier dynamics in wide band gap semiconductors is of great importance for UV detectors and emitters which are expected to be the building blocks for optoelectronic applications and high voltage electronics. On the experimental side, the progress made in the past two decades in generating subpicosecond laser pulses, resulted in numerous experiments that gave insight into the carrier dynamics in semiconductors. From the theoretical standpoint, the study of carrier interactions together with robust simulation methods, such as Monte-Carlo, provided great progress toward explaining the experimental results. These studies immensely improve our understanding of time scales of carrier recombination, relaxation and transport in semiconductor materials and devices which lead to optimizing the operation of optoelectronic devices, more specifically, emitters and detectors. Wide band gap materials having high breakdown field, wide band gap energy and high saturation velocity are among the most important semiconductors employed in the active layer of LEDs and lasers. GaN , its alloys, and ZnO are among the most important materials in semiconductor devices. Moreover, the use of lattice matched layers based on InAlN or InAlGaN is an alternative design approach which could mitigate the effect of polarization and enable growing thicker layers due to the higher structural quality. We first perform the study of carrier dynamics generated by ultrafast laser pulses in bulk GaN and ZnO materials to investigate the temperature dependent luminescence rise time. The obtained results are compared to the experimental results which show an excellent agreement. In this work, we use Monte Carlo method to evaluate the distribution of carriers considering the interaction of carriers with other carriers and also with polar optical phonons in the system. Considering the ongoing research about the advantages of lattice matched nitride based material systems, we also studied the properties of GaN layers lattice matched to InAlN and InAlGaN. As an application, we utilized the GaN/InAlGaN material system to study the carrier dynamics in Quantum Cascade Lasers. Furthermore, due to the superior properties of GaN which makes it an excellent candidate in power electronic applications, we also design and simulate an advanced vertical trench power MOSFET using drift diffusion and Monte Carlo models and characterize the performance of the device

Transport models and advanced numerical simulation of silicon-germanium heterojunction bipolar transistors

Applications in the emerging high-frequency markets for millimeter wave applications more and more use SiGe components for cost reasons. To support the technology effort, a reliable TCAD platform is required. The main issue in the simulation of scaled devices is related to the limitations of the physical models used to describe charge carrier transport. Inherent approximations in the HD formalism are discussed over different technology nodes, providing for the first time a complete survey of HD models capability and restrictions with scaling for simulation of SiGe HBTs. Moreover, a complete set of models for transport parameters of SiGe HBTs is reported, including low-field mobility, energy relaxation time, saturation velocity, high-field mobility and effective density of state. Implementation in a commercial device simulator is drawn and findings are compared with simulation results obtained using a standard set of models and with trustworthy results (i.e. MC and SHE simulation results and experimental data), validating proposed models and clarifying their reliability and accuracy over different technologies. Finally, electrical breakdown phenomena in SiGe HBTs are analyzed: a novel complete model for multiplication factor is reported and validated by experimental results; new M model provides an exhaustive accuracy over a wide range of collector voltages

Modelling and simulation study of NMOS Si nanowire transistors

Nanowire transistors (NWTs) represent a potential alternative to Silicon FinFET technology in the 5nm CMOS technology generation and beyond. Their gate length can be scaled beyond the limitations of FinFET gate length scaling to maintain superior off-state leakage current and performance thanks to better electrostatic control through the semiconductor nanowire channels by gate-all-around (GAA) architecture. Furthermore, it is possible to stack nanowires to enhance the drive current per footprint. Based on these considerations, vertically-stacked lateral NWTs have been included in the latest edition of the International Technology Roadmap for Semiconductors (ITRS) to allow for further performance enhancement and gate pitch scaling, which are key criteria of merit for the new CMOS technology generation. However, electrostatic confinement and the transport behaviour in these devices are more complex, especially in or beyond the 5nm CMOS technology generation. At the heart of this thesis is the model-based research of aggressively-scaled NWTs suitable for implementation in or beyond the 5nm CMOS technology generation, including their physical and operational limitations and intrinsic parameter fluctuations. The Ensemble Monte Carlo approach with Poisson-Schrödinger (PS) quantum corrections was adopted for the purpose of predictive performance evaluation of NWTs. The ratio of the major to the minor ellipsoidal cross-section axis (cross-sectional aspect ratio - AR) has been identified as a significant contributing factor in device performance. Until now, semiconductor industry players have carried out experimental research on NWTs with two different cross-sections: circular cylinder (or elliptical) NWTs and nanosheet (or nanoslab) NWTs. Each version has its own benefits and drawbacks; however, the key difference between these two versions is the cross-sectional AR. Several critical design questions, including the optimal NWT cross-sectional aspect ratio, remain unanswered. To answer these questions, the AR of a GAA NWT has been investigated in detail in this research maintaining the cross-sectional area constant. Signatures of isotropic charge distributions within Si NWTs were observed, exhibiting the same attributes as the golden ratio (Phi), the significance of which is well-known in the fields of art and architecture. To address the gap in the existing literature, which largely explores NWT scaling using single-channel simulation, thorough simulations of multiple channels vertically-stacked NWTs have been carried out with different cross-sectional shapes and channel lengths. Contact resistance, non-equilibrium transport and quantum confinement effects have been taken into account during the simulations in order to realistically access performance and scalability. Finally, the individual and combined effects of key statistical variability (SV) sources on threshold voltage (VT), subthreshold slope (SS), ON-current (Ion) and drain-induced barrier lowering (DIBL) have been simulated and discussed. The results indicate that the variability of NWTs is impacted by device architecture and dimensions, with a significant reduction in SV found in NWTs with optimal aspect ratios. Furthermore, a reduction in the variability of the threshold voltage has been observed in vertically-stacked NWTs due to the cancelling-out of variability in double and triple lateral channel NWTs

3D drift diffusion and 3D Monte Carlo simulation of on-current variability due to random dopants

In this work Random Discrete Dopant induced on-current variations have been studied using the Glasgow 3D atomistic drift/diffusion simulator and Monte Carlo simulations. A methodology for incorporating quantum corrections into self-consistent atomistic Monte Carlo simulations via the density gradient effective potential is presented. Quantum corrections based on the density gradient formalism are used to simultaneously capture quantum confinement effects. The quantum corrections not only capture charge confinement effects, but accurately represent the electron impurity interaction used in previous \textit{ab initio} atomistic MC simulations, showing agreement with bulk mobility simulation. The effect of quantum corrected transport variation in statistical atomistic MC simulation is then investigated using a series of realistic scaled devices nMOSFETs transistors with channel lengths 35 nm, 25 nm, 18nm, 13 nm and 9 nm. Such simulations result in an increased drain current variability when compared with drift diffusion simulation. The comprehensive statistical analysis of drain current variations is presented separately for each scaled transistor. The investigation has shown increased current variation compared with quantum corrected drift diffusion simulation and with previous classical MC results. Furthermore, it has been studied consistently the impact of transport variability due to scattering from random discrete dopants on the on-current variability in realistic nano CMOS transistors. For the first time, a hierarchic simulation strategy to accurately transfer the increased on-current variability obtained from the ‘ab initio’ MC simulations to DD simulations is subsequently presented. The MC corrected DD simulations are used to produce target $I_D-V_G$ characteristics from which statistical compact models are extracted for use in preliminary design kits at the early stage of new technology development. The impact of transport variability on the accuracy of delay simulation are investigated in detail. Accurate compact models extraction methodology transferring results from accurate physical variability simulation into statistical compact models suitable for statistical circuit simulation is presented. In order to examine te size of this effect on circuits Monte Carlo SPICE simulations of inverter were carried out for 100 samples

Gate leakage variability in nano-CMOS transistors

Gate leakage variability in nano-scale CMOS devices is investigated through advanced modelling and simulations of planar, bulk-type MOSFETs. The motivation for the work stems from the two of the most challenging issues in front of the semiconductor industry - excessive leakage power, and device variability - both being brought about with the aggressive downscaling of device dimensions to the nanometer scale. The aim is to deliver a comprehensive tool for the assessment of gate leakage variability in realistic nano-scale CMOS transistors. We adopt a 3D drift-diffusion device simulation approach with density-gradient quantum corrections, as the most established framework for the study of device variability. The simulator is first extended to model the direct tunnelling of electrons through the gate dielectric, by means of an improved WKB approximation. A study of a 25 nm square gate n-type MOSFET demonstrates that combined effect of discrete random dopants and oxide thickness variation lead to starndard deviation of up to 50% (10%) of the mean gate leakage current in OFF(ON)-state of the transistor. There is also a 5 to 6 times increase of the magnitude of the gate current, compared to that simulated of a uniform device. A significant part of the research is dedicated to the analysis of the non-abrupt bandgap and permittivity transition at the Si/SiO2 interface. One dimensional simulation of a MOS inversion layer with a 1nm SiO2 insulator and realistic band-gap transition reveals a strong impact on subband quantisation (over 50mV reduction in the delta-valley splitting and over 20% redistribution of carriers from the delta-2 to the delta-4 valleys), and enhancement of capacitance (over 10%) and leakage (about 10 times), relative to simulations with an abrupt band-edge transition at the interface