4 research outputs found

    Buffer-aware Worst Case Timing Analysis of Wormhole Network On Chip

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    A buffer-aware worst-case timing analysis of wormhole NoC is proposed in this paper to integrate the impact of buffer size on the different dependencies relationship between flows, i.e. direct and indirect blocking flows, and consequently the timing performance. First, more accurate definitions of direct and indirect blocking flows sets have been introduced to take into account the buffer size impact. Then, the modeling and worst-case timing analysis of wormhole NoC have been detailed, based on Network Calculus formalism and the newly defined blocking flows sets. This introduced approach has been illustrated in the case of a realistic NoC case study to show the trade off between latency and buffer size. The comparative analysis of our proposed Buffer-aware timing analysis with conventional approaches is conducted and noticeable enhancements in terms of maximum latency have been proved

    Timing Analysis of TDMA-based Networks using Network Calculus and Integer Linear Programming

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    For distributed safety-critical systems, such as avionics and automotive, shared networks represent a bottleneck for timing predictability, a key issue to fulfill certification requirements. To control interferences on such shared resources and guarantee bounded delays, the Time Division Multiple Access (TDMA) protocol is considered as one of the most interesting arbitration protocols due to its deterministic timing behavior and fault-tolerance features. This paper addresses the problem of computing the worst-case end-to-end delay bounds for traffic flows sharing a TDMA-based network using Network Calculus. First, we extend classic timing analysis to integrate the impact of non-preemptive message transmission and various service policies in end-systems, e.g., First In First Out (FIFO), Fixed Priority (FP) and Weighted Round Robin (WRR). Afterwards, the proposed models are refined using Integer Linear Programming (ILP) to obtain tighter end-to-end delay bounds. Finally, this general analysis is illustrated and validated in the case of a TDMA-based Ethernet network for I/O avionics applications. Results show the efficiency of the proposed models to provide stronger guarantees on system schedulability, compared to classic models

    A network calculus model for SpaceWire networks

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    SpaceWire is a wormhole network standard scheduled to be used as the sole on-board network for future satellites by the ESA. As the network will be shared by real-time and non real-time traffic, network designers require a tool to check that temporal constraints are verified for all the urgent messages. Existing work on wormhole networks has focused either on wormhole network with built-in real-time mechanisms or on best-effort wormhole NoCs with use cases very different from those of SpaceWire. In this paper, we propose a model for a best-effort wormhole network based on Network Calculus theory that properly models the behavior of a SpaceWire network thanks to a new network element, the Wormhole Section
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