2 research outputs found
A Microbenchmark Characterization of the Emu Chick
The Emu Chick is a prototype system designed around the concept of migratory
memory-side processing. Rather than transferring large amounts of data across
power-hungry, high-latency interconnects, the Emu Chick moves lightweight
thread contexts to near-memory cores before the beginning of each memory read.
The current prototype hardware uses FPGAs to implement cache-less "Gossamer
cores for doing computational work and a stationary core to run basic operating
system functions and migrate threads between nodes. In this multi-node
characterization of the Emu Chick, we extend an earlier single-node
investigation (Hein, et al. AsHES 2018) of the the memory bandwidth
characteristics of the system through benchmarks like STREAM, pointer chasing,
and sparse matrix-vector multiplication. We compare the Emu Chick hardware to
architectural simulation and an Intel Xeon-based platform. Our results
demonstrate that for many basic operations the Emu Chick can use available
memory bandwidth more efficiently than a more traditional, cache-based
architecture although bandwidth usage suffers for computationally intensive
workloads like SpMV. Moreover, the Emu Chick provides stable, predictable
performance with up to 65% of the peak bandwidth utilization on a random-access
pointer chasing benchmark with weak locality
Wrangling Rogues: Managing Experimental Post-Moore Architectures
The Rogues Gallery is a new experimental testbed that is focused on tackling
"rogue" architectures for the Post-Moore era of computing. While some of these
devices have roots in the embedded and high-performance computing spaces,
managing current and emerging technologies provides a challenge for system
administration that are not always foreseen in traditional data center
environments.
We present an overview of the motivations and design of the initial Rogues
Gallery testbed and cover some of the unique challenges that we have seen and
foresee with upcoming hardware prototypes for future post-Moore research.
Specifically, we cover the networking, identity management, scheduling of
resources, and tools and sensor access aspects of the Rogues Gallery and
techniques we have developed to manage these new platforms