A Method for Analog Circuits Visualization

A method for visualization of analog circuit schematic starting from a netlist is described in this paper. The images obtained have a comprehensible form, symmetrical structures and other analog topological patterns being discovered in the circuit netlist. The method is based on two algorithms. The first one, the symmetry algorithm, exploits the possibility to extract topology information from a graph representation of the circuit. The second one performs a grid expansion on a directed graph structure, using the results of the symmetry algorithm. The method has been implemented in the "A-warD" program. Test-cases demonstrate the effectiveness of the method. 1. Introduction In recent years, automated methods for the design of analog integrated circuits have been proposed [1, 2, 3]. These methods helped the IC designers in handling the increasing complexity of the IC designs. Late stages of the IC design process, i.e. the layout design, are usually repeated several times until an accept..