28 research outputs found
Interface Circuits for Microsensor Integrated Systems
ca. 200 words; this text will present the book in all promotional forms (e.g. flyers). Please describe the book in straightforward and consumer-friendly terms. [Recent advances in sensing technologies, especially those for Microsensor Integrated Systems, have led to several new commercial applications. Among these, low voltage and low power circuit architectures have gained growing attention, being suitable for portable long battery life devices. The aim is to improve the performances of actual interface circuits and systems, both in terms of voltage mode and current mode, in order to overcome the potential problems due to technology scaling and different technology integrations. Related problems, especially those concerning parasitics, lead to a severe interface design attention, especially concerning the analog front-end and novel and smart architecture must be explored and tested, both at simulation and prototype level. Moreover, the growing demand for autonomous systems gets even harder the interface design due to the need of energy-aware cost-effective circuit interfaces integrating, where possible, energy harvesting solutions. The objective of this Special Issue is to explore the potential solutions to overcome actual limitations in sensor interface circuits and systems, especially those for low voltage and low power Microsensor Integrated Systems. The present Special Issue aims to present and highlight the advances and the latest novel and emergent results on this topic, showing best practices, implementations and applications. The Guest Editors invite to submit original research contributions dealing with sensor interfacing related to this specific topic. Additionally, application oriented and review papers are encouraged.
Electronics for Sensors
The aim of this Special Issue is to explore new advanced solutions in electronic systems and interfaces to be employed in sensors, describing best practices, implementations, and applications. The selected papers in particular concern photomultiplier tubes (PMTs) and silicon photomultipliers (SiPMs) interfaces and applications, techniques for monitoring radiation levels, electronics for biomedical applications, design and applications of time-to-digital converters, interfaces for image sensors, and general-purpose theory and topologies for electronic interfaces
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CMOS Transducers and Programmable Interface Circuits for Resource-Efficient Sensing Applications
Modern sensors are complex systems comprising multiple sub-systems such as transducers, analog and mixed-signal interface circuits, digital processing circuits, and packaging. Over the last few decades, innovations in these sub-systems combined with their increased integration in complementary metal-oxide semiconductor (CMOS) processes have led to the rapid growth in sensors for the Internet-of-Things (IoT), wearable devices, and fundamental scientific instrumentation. This thesis introduces novel ideas for various parts of a sensor signal chain.
First, CMOS-based transducers (i.e. sensing elements) are introduced. Single-photon avalanche diodes (SPADs) fabricated in 0.18”m and 0.13”m standard CMOS processes are demonstrated and characterized for various optical sensing techniques. A resistor fabricated using standard CMOS-BEOL layers in a 0.18”m process is used to demonstrate a compact, fully-integrated single-element flow sensor occupying less than 0.065mm2.
Second, front-end interface circuits for single-photon optical detectors are introduced. A fully-integrated SPAD-based ambient light sensor using mostly digital circuits and fabricated in a 0.13”m CMOS process is highlighted. It consumes 125ΌW and achieves one of the lowest reported areas (0.046mm2) in the literature. A custom analog front-end (AFE) chip is fabricated in a 0.18”m CMOS process for interfacing with a commercial silicon photomultiplier (SiPM) for gamma spectroscopy. It incorporates tunability of dynamic range and integration time, thus making it suitable for different detectors (i.e. SiPM and scintillator crystal combinations).
Third, non-linear analog-to-digital converters (NL-ADCs) are explored as a viable alternative to linear ADCs for information-aware, non-uniform quantization and a widely reconfigurable piecewise-linear analog-to-digital converter (PWL-ADC) prototype chip (0.18”m CMOS) is used to validate this. With a 7-bit output word, it achieves 5.6-bit to 9.5-bit resolution in user-defined regions of the input full-scale range (FSR), while consuming 105”W at a sampling frequency of 42kHz. Measurements with recorded ECG waveforms are used to highlight the application-specific advantages of the PWL-ADC.
Finally, some of the aforementioned ideas are used at the system level in a gamma spectrometer realized on a printed circuit board (PCB). The PCB design includes the AFE and PWL-ADC IC chips, a commercial SiPM and scintillator crystal, and a FPGA-based digital back-end (DBE). Several linear and non-linear isotope spectra with variable energy bin-widths (dE/bin) are recorded and analyzed to demonstrate the utility of the proposed concepts for peak enhancement and improved peak discrimination in radiation spectroscopy
CMOS SPAD-based image sensor for single photon counting and time of flight imaging
The facility to capture the arrival of a single photon, is the fundamental limit to the detection of quantised
electromagnetic radiation. An image sensor capable of capturing a picture with this ultimate optical and
temporal precision is the pinnacle of photo-sensing. The creation of high spatial resolution, single photon
sensitive, and time-resolved image sensors in complementary metal oxide semiconductor (CMOS) technology
offers numerous benefits in a wide field of applications. These CMOS devices will be suitable to replace high
sensitivity charge-coupled device (CCD) technology (electron-multiplied or electron bombarded) with
significantly lower cost and comparable performance in low light or high speed scenarios. For example, with
temporal resolution in the order of nano and picoseconds, detailed three-dimensional (3D) pictures can be
formed by measuring the time of flight (TOF) of a light pulse. High frame rate imaging of single photons can
yield new capabilities in super-resolution microscopy. Also, the imaging of quantum effects such as the
entanglement of photons may be realised.
The goal of this research project is the development of such an image sensor by exploiting single photon
avalanche diodes (SPAD) in advanced imaging-specific 130nm front side illuminated (FSI) CMOS technology.
SPADs have three key combined advantages over other imaging technologies: single photon sensitivity,
picosecond temporal resolution and the facility to be integrated in standard CMOS technology. Analogue
techniques are employed to create an efficient and compact imager that is scalable to mega-pixel arrays. A
SPAD-based image sensor is described with 320 by 240 pixels at a pitch of 8ÎŒm and an optical efficiency or
fill-factor of 26.8%. Each pixel comprises a SPAD with a hybrid analogue counting and memory circuit that
makes novel use of a low-power charge transfer amplifier. Global shutter single photon counting images are
captured. These exhibit photon shot noise limited statistics with unprecedented low input-referred noise at an
equivalent of 0.06 electrons.
The CMOS image sensor (CIS) trends of shrinking pixels, increasing array sizes, decreasing read noise, fast
readout and oversampled image formation are projected towards the formation of binary single photon imagers
or quanta image sensors (QIS). In a binary digital image capture mode, the image sensor offers a look-ahead to
the properties and performance of future QISs with 20,000 binary frames per second readout with a bit error
rate of 1.7 x 10-3. The bit density, or cumulative binary intensity, against exposure performance of this image
sensor is in the shape of the famous Hurter and Driffield densitometry curves of photographic film.
Oversampled time-gated binary image capture is demonstrated, capturing 3D TOF images with 3.8cm
precision in a 60cm range
Photodetectors
In this book some recent advances in development of photodetectors and photodetection systems for specific applications are included. In the first section of the book nine different types of photodetectors and their characteristics are presented. Next, some theoretical aspects and simulations are discussed. The last eight chapters are devoted to the development of photodetection systems for imaging, particle size analysis, transfers of time, measurement of vibrations, magnetic field, polarization of light, and particle energy. The book is addressed to students, engineers, and researchers working in the field of photonics and advanced technologies
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Development of a Portable CMOS Time-Domain Fluorescence Lifetime Imager
Modern laboratory equipments to measure the excited-state lifetime of fluorophores usually include an expensive picosecond pulsed-laser excitation source, a fragile photomultiplier tube, and a large instrument body for optics. A portable and robust device to make fluorescence lifetime measurement in nanosecond scale is of great attraction for chemists and biologists.
This dissertation reports the development of a portable LED time-domain fluorimeter from an all-solid-state discrete-component prototype to its advanced CMOS integrated circuit implementation. The motivation of the research is to develop a multiplexed fluorimeter for point-of-care diagnosis. Instruments developed by this novel method have higher fill factor, are more portable, and are fabricated at lower cost
Detector Technologies for CLIC
The Compact Linear Collider (CLIC) is a high-energy high-luminosity linear
electron-positron collider under development. It is foreseen to be built and
operated in three stages, at centre-of-mass energies of 380 GeV, 1.5 TeV and 3
TeV, respectively. It offers a rich physics program including direct searches
as well as the probing of new physics through a broad set of precision
measurements of Standard Model processes, particularly in the Higgs-boson and
top-quark sectors. The precision required for such measurements and the
specific conditions imposed by the beam dimensions and time structure put
strict requirements on the detector design and technology. This includes
low-mass vertexing and tracking systems with small cells, highly granular
imaging calorimeters, as well as a precise hit-time resolution and power-pulsed
operation for all subsystems. A conceptual design for the CLIC detector system
was published in 2012. Since then, ambitious R&D programmes for silicon vertex
and tracking detectors, as well as for calorimeters have been pursued within
the CLICdp, CALICE and FCAL collaborations, addressing the challenging detector
requirements with innovative technologies. This report introduces the
experimental environment and detector requirements at CLIC and reviews the
current status and future plans for detector technology R&D.Comment: 152 pages, 116 figures; published as CERN Yellow Report Monograph
Vol. 1/2019; corresponding editors: Dominik Dannheim, Katja Kr\"uger, Aharon
Levy, Andreas N\"urnberg, Eva Sickin
Feasibility of Geiger-mode avalanche photodiodes in CMOS standard technologies for tracker detectors
The next generation of particle colliders will be characterized by linear lepton colliders, where the collisions between electrons and positrons will allow to study in great detail the new particle discovered at CERN in 2012 (presumably the Higgs boson). At present time, there are two alternative projects underway, namely the ILC (International Linear Collider) and CLIC (Compact LInear Collider). From the detector point of view, the physics aims at these particle colliders impose such extreme requirements, that there is no sensor technology available in the market that can fulfill all of them. As a result, several new detector systems are being developed in parallel with the accelerator.
This thesis presents the development of a GAPD (Geiger-mode Avalanche PhotoDiode) pixel detector aimed mostly at particle tracking at future linear colliders. GAPDs offer outstanding qualities to meet the challenging requirements of ILC and CLIC, such as an extraordinary high sensitivity, virtually infinite gain and ultra-fast response time, apart from compatibility with standard CMOS technologies. In particular, GAPD detectors enable the direct conversion of a single particle event onto a CMOS digital pulse in the sub-nanosecond time scale without the utilization of either preamplifiers or pulse shapers. As a result, GAPDs can be read out after each single bunch crossing, a unique quality that none of its competitors can offer at the moment. In spite of all these advantages, GAPD detectors suffer from two main problems. On the one side, there exist noise phenomena inherent to the sensor, which induce noise pulses that cannot be distinguished from real particle events and also worsen the detector occupancy to unacceptable levels. On the other side, the fill-factor is too low and gives rise to a reduced detection efficiency.
Solutions to the two problems commented that are compliant with the severe specifications of the next generation of particle colliders have been thoroughly investigated. The design and characterization of several single pixels and small arrays that incorporate some elements to reduce the intrinsic noise generated by the sensor are presented. The sensors and the readout circuits have been monolithically integrated in a conventional HV-CMOS 0.35 ÎŒm process. Concerning the readout circuits, both voltage-mode and current-mode options have been considered. Moreover, the time-gated operation has also been explored as an alternative to reduce the detected sensor noise. The design and thorough characterization of a prototype GAPD array, also monolithically integrated in a conventional 0.35 ÎŒm HV-CMOS process, is presented in the thesis as well. The detector consists of 10 rows x 43 columns of pixels, with a total sensitive area of 1 mm x 1 mm. The array is operated in a time-gated mode and read out sequentially by rows. The efficiency of the proposed technique to reduce the detected noise is shown with a wide variety of measurements. Further improved results are obtained with the
reduction of the working temperature. Finally, the suitability of the proposed detector array for particle detection is shown with the results of a beam-test campaign conducted at CERN-SPS (European Organization for Nuclear Research-Super Proton Synchrotron). Apart from that, a series of additional approaches to improve the performance of the GAPD technology are proposed. The benefits of integrating a GAPD pixel array in a 3D process in terms of overcoming the fill-factor limitation are examined first. The design of a GAPD detector in the Global Foundries 130 nm/Tezzaron 3D process is also presented. Moreover, the possibility to obtain better results in light detection applications by means of the time-gated operation or correction techniques is analyzed too.Aquesta tesi presenta el desenvolupament dâun detector de pĂxels de GAPDs (Geiger-mode Avalanche PhotoDiodes) dedicat principalment a rastrejar partĂcules en futurs colâąlisionadors lineals. Els GAPDs ofereixen unes qualitats extraordinĂ ries per satisfer els requisits extremadament exigents dâILC (International Linear Collider) i CLIC (Compact LInear Collider), els dos projectes per la propera generaciĂł de colâąlisionadors que sâhan proposat fins a dia dâavui. Entre aquestes qualitats es troben una sensibilitat extremadament elevada, un guany virtualment infinit i una resposta molt rĂ pida, a part de ser compatibles amb les tecnologies CMOS estĂ ndard. En concret, els detectors de GAPDs fan possible la conversiĂł directa dâun esdeveniment generat per una sola partĂcula en un senyal CMOS digital amb un temps inferior al nanosegon. Com a resultat dâaquest fet, els GAPDs poden ser llegits desprĂ©s de cada bunch crossing (la colâąlisiĂł de les partĂcules), una qualitat Ășnica que cap dels seus competidors pot oferir en el moment actual. Malgrat tots aquests avantatges, els detectors de GAPDs pateixen dos grans problemes. Dâuna banda, existeixen fenĂČmens de soroll inherents al sensor, els quals indueixen polsos de soroll que no poden ser distingits dels esdeveniments reals generats per partĂcules i que a mĂ©s empitjoren lâocupaciĂł del detector a nivells inacceptables. Dâaltra banda, el fill-factor (Ă©s a dir, lâĂ rea sensible respecte lâĂ rea total) Ă©s molt baix i redueix lâeficiĂšncia detectora.
En aquesta tesi sâhan investigat solucions als dos problemes comentats i que a mĂ©s compleixen amb les especificacions altament severes dels futurs colâąlisionadors lineals. El detector de pĂxels de GAPDs, el qual ha estat monolĂticament integrat en un procĂ©s HV-CMOS estĂ ndard de 0.35 ÎŒm, incorpora circuits de lectura en mode voltatge que permeten operar el sensor en lâanomenat mode time-gated per tal de reduir el soroll detectat. LâeficiĂšncia de la tĂšcnica proposada queda demostrada amb la gran varietat dâexperiments que sâhan dut a terme. Els resultats del beam-test dut a terme al CERN indiquen la capacitat del detector de pĂxels de GAPDs per detectar partĂcules altament energĂštiques. A banda dâaixĂČ, tambĂ© sâhan estudiat els beneficis dâintegrar un detector de pĂxels de GAPDs en un procĂ©s 3D per tal dâincrementar el fill-factor. LâanĂ lisi realitzat conclou que es poden assolir fill-factors superiors al 90%
Miniature high dynamic range time-resolved CMOS SPAD image sensors
Since their integration in complementary metal oxide (CMOS) semiconductor technology in 2003,
single photon avalanche diodes (SPADs) have inspired a new era of low cost high integration
quantum-level image sensors. Their unique feature of discerning single photon detections, their ability
to retain temporal information on every collected photon and their amenability to high speed image
sensor architectures makes them prime candidates for low light and time-resolved applications.
From the biomedical field of fluorescence lifetime imaging microscopy (FLIM) to extreme physical
phenomena such as quantum entanglement, all the way to time of flight (ToF) consumer applications
such as gesture recognition and more recently automotive light detection and ranging (LIDAR), huge
steps in detector and sensor architectures have been made to address the design challenges of pixel
sensitivity and functionality trade-off, scalability and handling of large data rates.
The goal of this research is to explore the hypothesis that given the state of the art CMOS nodes and
fabrication technologies, it is possible to design miniature SPAD image sensors for time-resolved
applications with a small pixel pitch while maintaining both sensitivity and built -in functionality.
Three key approaches are pursued to that purpose: leveraging the innate area reduction of logic gates
and finer design rules of advanced CMOS nodes to balance the pixelâs fill factor and processing
capability, smarter pixel designs with configurable functionality and novel system architectures that
lift the processing burden off the pixel array and mediate data flow.
Two pathfinder SPAD image sensors were designed and fabricated: a 96 Ă 40 planar front side
illuminated (FSI) sensor with 66% fill factor at 8.25ÎŒm pixel pitch in an industrialised 40nm process
and a 128 Ă 120 3D-stacked backside illuminated (BSI) sensor with 45% fill factor at 7.83ÎŒm pixel
pitch. Both designs rely on a digital, configurable, 12-bit ripple counter pixel allowing for time-gated
shot noise limited photon counting. The FSI sensor was operated as a quanta image sensor (QIS)
achieving an extended dynamic range in excess of 100dB, utilising triple exposure windows and in-pixel
data compression which reduces data rates by a factor of 3.75Ă. The stacked sensor is the first
demonstration of a wafer scale SPAD imaging array with a 1-to-1 hybrid bond connection.
Characterisation results of the detector and sensor performance are presented.
Two other time-resolved 3D-stacked BSI SPAD image sensor architectures are proposed. The first is a
fully integrated 5-wire interface system on chip (SoC), with built-in power management and off-focal
plane data processing and storage for high dynamic range as well as autonomous video rate operation.
Preliminary images and bring-up results of the fabricated 2mmÂČ sensor are shown. The second is a
highly configurable design capable of simultaneous multi-bit oversampled imaging and programmable
region of interest (ROI) time correlated single photon counting (TCSPC) with on-chip histogram
generation. The 6.48ÎŒm pitch array has been submitted for fabrication. In-depth design details of both
architectures are discussed