A PUF-and biometric-based lightweight hardware solution to increase security at sensor nodes

Security is essential in sensor nodes which acquire and transmit sensitive data. However, the constraints of processing, memory and power consumption are very high in these nodes. Cryptographic algorithms based on symmetric key are very suitable for them. The drawback is that secure storage of secret keys is required. In this work, a low-cost solution is presented to obfuscate secret keys with Physically Unclonable Functions (PUFs), which exploit the hardware identity of the node. In addition, a lightweight fingerprint recognition solution is proposed, which can be implemented in low-cost sensor nodes. Since biometric data of individuals are sensitive, they are also obfuscated with PUFs. Both solutions allow authenticating the origin of the sensed data with a proposed dual-factor authentication protocol. One factor is the unique physical identity of the trusted sensor node that measures them. The other factor is the physical presence of the legitimate individual in charge of authorizing their transmission. Experimental results are included to prove how the proposed PUF-based solution can be implemented with the SRAMs of commercial Bluetooth Low Energy (BLE) chips which belong to the communication module of the sensor node. Implementation results show how the proposed fingerprint recognition based on the novel texture-based feature named QFingerMap16 (QFM) can be implemented fully inside a low-cost sensor node. Robustness, security and privacy issues at the proposed sensor nodes are discussed and analyzed with experimental results from PUFs and fingerprints taken from public and standard databases.Ministerio de Economía, Industria y Competitividad TEC2014-57971-R, TEC2017-83557-

ADAPTABLE FINGERPRINT MINUTIAE EXTRACTION ALGORITHM BASED-ON CROSSING NUMBER METHOD FOR HARDWARE IMPLEMENTATION USING FPGA DEVICE

In this article. a main perspective of developing and implementing fingerprint extraction and matching algorithms as a pari of fingerprint recognition system is focused. First, developing a simple algorithm to extract fingerprint features and test this algorithm on Pc. The second thing is implementing this algorithm into FPGA devices. The major research topics on which the proposed approach is developing and modifying fingerprint extraction feature algorithm. This development and modification are using crossing number method on pixel representation value '0'. In this new proposed algorithm, it is no need a process concerning ROI segmentation and no trigonometry calculation. And specially in obtaining their parameters using Angle Calculation Block avoiding floating points calculation. As this method is local feature that usually involve with 60-100 minutiae points, makes the template is small in size. Providing FAR. FRR and EER, performs the performance evaluation of proposed algorithm. The result is an adaptable fingerprint minutiae extraction algorithm into hardware implementation with 14.05 % of EEl?, better than reference algorithm, which is 20.39 % . The computational time is 18 seconds less than a similar method, which takes 60-90 seconds just for pre-processing step. The first step of algorithm implementation in hardware environment (embedded) using FPGA Device by developing IP Core without using any soft processor is presented

Model-based design for selecting fingerprint recognition algorithms for embedded systems

Most of contributions for biometric recognition solutions (and specifically for fingerprint recognition) are implemented in software on PC or similar platforms. However, the wide spread of embedded systems means that fingerprint embedded systems will be progressively demanded and, hence, hardware dedicated solutions are needed to satisfy their constraints. CAD tools from Matlab-Simulink ease hardware design for embedded systems because automatize the design process from high-level descriptions to device implementation. Verification of results is set at different abstraction levels (high- level description, hardware code simulation, and device implementation). This paper shows how a design flow based on models facilitates the selection of algorithms for fingerprint embedded systems. In particular, the search of a solution for directional image extraction suitable for its application to singular point extraction is detailed. Implementation results in terms of area occupation and timing are presented for different Xilinx FPGAs.Ministerio de Economía y Competitividad TEC2011-24319Junta de Andalucía P08-TIC-03674Comunidad Europea FP7-INFSO-ICT-24885

Hardware-software co-design of an iris recognition algorithm

This paper describes the implementation of an iris recognition algorithm based on hardware-software co-design. The system architecture consists of a general-purpose 32- bit microprocessor and several slave coprocessors that accelerate the most intensive calculations. The whole iris recognition algorithm has been implemented on a low-cost Spartan 3 FPGA, achieving significant reduction in execution time when compared to a conventional software-based application. Experimental results show that with a clock speed of 40 MHz, an IrisCode is obtained in less than 523 ms from an image of 640x480 pixels, which is just 20% of the total time needed by a software solution running on the same microprocessor embedded in the architecture.Peer ReviewedPreprin

A Multimodal Technique for an Embedded Fingerprint Recognizer in Mobile Payment Systems

The development and the diffusion of distributed systems, directly connected to recent communication technologies, move people towards the era of mobile and ubiquitous systems. Distributed systems make merchant-customer relationships closer and more flexible, using reliable e-commerce technologies. These systems and environments need many distributed access points, for the creation and management of secure identities and for the secure recognition of users. Traditionally, these access points can be made possible by a software system with a main central server. This work proposes the study and implementation of a multimodal technique, based on biometric information, for identity management and personal ubiquitous authentication. The multimodal technique uses both fingerprint micro features (minutiae) and fingerprint macro features (singularity points) for robust user authentication. To strengthen the security level of electronic payment systems, an embedded hardware prototype has been also created: acting as self-contained sensors, it performs the entire authentication process on the same device, so that all critical information (e.g. biometric data, account transactions and cryptographic keys), are managed and stored inside the sensor, without any data transmission. The sensor has been prototyped using the Celoxica RC203E board, achieving fast execution time, low working frequency, and good recognition performance

Recent Application in Biometrics

In the recent years, a number of recognition and authentication systems based on biometric measurements have been proposed. Algorithms and sensors have been developed to acquire and process many different biometric traits. Moreover, the biometric technology is being used in novel ways, with potential commercial and practical implications to our daily activities. The key objective of the book is to provide a collection of comprehensive references on some recent theoretical development as well as novel applications in biometrics. The topics covered in this book reflect well both aspects of development. They include biometric sample quality, privacy preserving and cancellable biometrics, contactless biometrics, novel and unconventional biometrics, and the technical challenges in implementing the technology in portable devices. The book consists of 15 chapters. It is divided into four sections, namely, biometric applications on mobile platforms, cancelable biometrics, biometric encryption, and other applications. The book was reviewed by editors Dr. Jucheng Yang and Dr. Norman Poh. We deeply appreciate the efforts of our guest editors: Dr. Girija Chetty, Dr. Loris Nanni, Dr. Jianjiang Feng, Dr. Dongsun Park and Dr. Sook Yoon, as well as a number of anonymous reviewers

Portable and Efficient Fingerprint Authentication System Based on a Microcontroller

This paper presents the design of a fingerprint authentication system based on a simple microcontroller and the fingerprint sensor. The circuit diagram and details regarding the procedure are included. The system was programed in MPLAB and then embedded into the microcontroller. Communication between the PIC and sensor is by RS232 protocol. The results show that the system recognizes the fingerprint in less than 1 second. It is portable and there is no need for image processing. Furthermore, the system shows a high effectiveness when storing and verifying fingerprints

Band-Limited Phase-Only Correlation (Blpoc) Using Fpga For Finger Vein Recognition System

Nowadays, due to the high security and reliable of finger vein pattern, it had become one of the major interests in the biometric research. In the last few years, a number of finger vein recognition algorithms have been proposed. Most of the proposed methods were implemented in software-based on a general-purpose processor, which have limitations on the processing speed, size and power consumption. To overcome these limitations, this thesis presents an architecture for finger vein recognition system based on BLPOC matching method. The BLPOC is a phase-based matching method which have benefits of high accuracy and less affected by image shifted or brightness changed. It involves a high computation process, which is 2D-DFT, therefore, it is necessary to implement on a hardware device such as FPGA. It consists of two types of multiplexer blocks, one DFT block, one CORDIC block, seven types of memory blocks, one subtracter block, one divider block and one comparator block; and is implemented using Verilog HDL and verified using the Altera Cyclone III EP3C120F780 FPGA board. The proposed DFT block had contributed to reduce the area used by 97% of the previously proposed DFT block. A finger vein image database of 204 classes has been used to evaluate the performance of the proposed architecture. Results show that the proposed architecture can process a single matching of two finger vein images in 1.15 ms, which is about nine times faster than the softwarebased implementation, while the accuracy is similar with the software-based implementation. In conclusion, the finger vein recognition system based on BLPOC is successfully implemented on a FPGA board with better processing time as compared with the software-based implementation

Acceleration of Complex Algorithms on a Fast Reconfigurable Embedded System on Spartan-3

Complex algorithms usually require several computation stages. Many embedded microprocessors have not enough computational performance to resolve these algorithms in a reasonable time, so dedicated coprocessors accelerate them although the main drawback is the area devoted to them. A reconfigurable coprocessor can drastically reduce the area, since it accommodates a set of coprocessors whose execution is multiplexed on time, although the reconfiguration speed reduces the overall system performance. Although self-reconfigurable systems are possible on Spartan-3 FPGAs, it requires a hard design task due to the lack of software and hardware support available on higher-cost families. This paper describes the architecture of a fast self-reconfigurable embedded system mapped on Spartan-3, used as computation platform to solve a complex algorithm, such as the image-processing carried out in a fingerprint biometric algorithm. In order to reduce the reconfiguration time, the system uses our custom-made memory and reconfiguration controllers. Moreover, the dynamic coprocessor can access directly to external memory through our memory controller to improve processing time.Peer ReviewedPostprint (published version