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    A Fast Fpga Implementation Of Tate Pairing In Cryptography Over Binary Field

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    Tate pairing is a bilinear map used in identity based cryptography schemes. In this paper, we propose an efficient FPGA implementation of the Tate pairing computation on supersingular elliptic curve in GF(2 283). Because Tate pairing is quite computationally expensive, it is more suitable to implement it using hardware than using software. In this work, we have designed and synthesized all the arithmetic units as well as the Tate pairing module using Xilinx\u27s FPGA. The results of our experiments demonstrate that the FPGA implementation can speed up the Tate pairing computation by 152 times compared to a software based implementation
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