2 research outputs found

    64Gb/s transmission over 57m MMF using an NRZ modulated 850nm VCSEL

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    We report a directly modulated 850nm VCSEL-based optical link operating error free (BER < 1E-12) at 64Gb/s over 57m of OM4 multimode fiber. At 60Gb/s, the error free distance increases to 107m

    μ΅œμ μ— κ°€κΉŒμš΄ 타이밍 적응을 μœ„ν•΄ 치우친 데이터 레벨과 눈 경사 디텍터λ₯Ό μ‚¬μš©ν•œ μ΅œλŒ€ λˆˆν¬κΈ°μΆ”μ  클럭 및 데이터 λ³΅μ›νšŒλ‘œ 섀계

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    ν•™μœ„λ…Όλ¬Έ (박사) -- μ„œμšΈλŒ€ν•™κ΅ λŒ€ν•™μ› : κ³΅κ³ΌλŒ€ν•™ 전기·정보곡학뢀, 2021. 2. 정덕균.이 λ…Όλ¬Έμ—μ„œλŠ” μ΅œμ†Œ-λΉ„νŠΈ λΉ„νŠΈ μ—λŸ¬μœ¨ (BER)에 λŒ€ν•œ μ΅œλŒ€ 눈크기 좔적 CDR (MET-CDR)의 섀계가 μ œμ•ˆλ˜μ—ˆλ‹€. μ œμ•ˆ 된 CDR 은 졜적의 μƒ˜ν”Œλ§ 단계λ₯Ό μ°ΎκΈ° μœ„ν•΄ 반볡 절차λ₯Ό 가진 BER μΉ΄μš΄ν„° λ˜λŠ” 아이 λͺ¨λ‹ˆν„°κ°€ ν•„ μš”ν•˜μ§€ μ•Šλ‹€. μ—λŸ¬ μƒ˜ν”ŒλŸ¬ 좜λ ₯에 κ°€μ€‘μΉ˜λ₯Ό 두어 λ”ν•˜μ—¬ 얻은 치우친 데 이터 레벨 (biased dLev) 은 사전 μ»€μ„œ ISI(pre-cursor ISI) 의 정보도 κ³ λ €ν•œ 눈 높이 정보λ₯Ό μΆ”μΆœν•œλ‹€. 델타 T 만큼의 μ‹œκ°„ 차이λ₯Ό λ‘” μ§€μ μ—μ„œ μž‘λ™ ν•˜λŠ” 두 μƒ˜ν”ŒλŸ¬λŠ” ν˜„μž¬ 눈 높이와 눈 기울기의 극성을 κ°μ§€ν•˜κ³ , 이 정보 λ₯Ό 톡해 μ œμ•ˆν•˜λŠ” CDR 은 눈 κΈ°μšΈκΈ°κ°€ 0 μ΄λ˜λŠ” μ΅œλŒ€ 눈 λ†’μ΄λ‘œ μˆ˜λ ΄ν•œ λ‹€. μΈ‘μ • κ²°κ³ΌλŠ” μ΅œλŒ€ 눈 높이와 μ΅œμ†Œ BER 의 μƒ˜ν”Œλ§ μœ„μΉ˜κ°€ 잘 일치 함 을 보여쀀닀. 28nm CMOS κ³΅μ •μœΌλ‘œ κ΅¬ν˜„λœ μˆ˜μ‹ κΈ° 칩은 23.5dB 의 채널 손싀이 μžˆλŠ” μƒνƒœμ—μ„œ 26Gb/s μ—μ„œ λ™μž‘ κ°€λŠ₯ν•˜λ‹€. 0.25UI 의 아이 μ˜€ν”„λ‹ 을 가지며, 87mW 의 νŒŒμ›Œλ₯Ό μ†ŒλΉ„ν•œλ‹€.In this thesis, design of a maximum-eye-tracking CDR (MET-CDR) for minimum bit error rate (BER) is proposed. The proposed CDR does not require a BER coun-ter or an eye-opening monitor with any iterative procedure to find the near-optimal sampling phase. The biased data-level obtained from the weighted sum of error sampler outputs, UP and DN, extracts the actual eye height information in the presence of pre-cursor ISI. Two samplers operating on two slightly different tim-ings detect the current eye height and the polarity of the eye slope so that the CDR tracks the maximum eye height where the slope becomes zero. Measured results show that the sampling phase of the maximum eye height and that of the mini-mum BER match well. A prototype receiver fabricated in 28 nm CMOS process operates at 26 Gb/s with an eye-opening of 0.25 UI and consumes 87 mW while equalizing 23.5 dB of loss at 13 GHz.ABSTRACT I CONTENTS II LIST OF FIGURES IV LIST OF TABLES VIII CHAPTER 1 INTRODUCTION 1 1.1 MOTIVATION 1 1.2 THESIS ORGANIZATION 4 CHAPTER 2 BACKGROUNDS 5 2.1 RECEIVER FRONT-END 5 2.1.1 CHANNEL 7 2.1.2 EQUALIZER 17 2.1.3 CDR 32 2.2 PRIOR ARTS ON CLOCK RECOVERY 39 2.2.1 BB-CDR 39 2.2.2 BER-BASED CDR 41 2.2.3 EOM-BASED CDR 44 2.3 CONCEPT OF THE PROPOSED CDR 47 CHAPTER 3 MAXIMUM-EYE-TRACKING CDR WITH BIASED DATA-LEVEL AND EYE SLOPE DETECTOR 49 3.1 OVERVIEW 49 3.2 DESIGN OF MET-CDR 50 3.2.1 EYE HEIGHT INFORMATION FROM BIASED DATA-LEVEL 50 3.2.2 EYE SLOPE DETECTOR AND ADAPTATION ALGORITHM 60 3.2.3 ARCHITECTURE AND IMPLEMENTATION 67 3.2.4 VERIFICATION OF THE ALGORITHM 71 3.2.5 ANALYSIS ON THE BIASED DATA-LEVEL 76 3.3 EXPANSION OF MET-CDR TO PAM4 SIGNALING 84 3.3.1 MET-CDR WITH PAM4 84 3.3.2 CONSIDERATIONS FOR PAM4 87 CHAPTER 4 MEASUREMENT RESULTS 89 CHAPTER 5 CONCLUSION 99 APPENDIX A MATLAB CODE FOR SIMULATING RECEIVER WITH MET-CDR 100 BIBLIOGRAPHY 105 초 둝 113Docto
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