A 5-Gb/s 66 dB CMOS variable-gain amplifier with reconfigurable DC-offset cancellation for multi-standard applications

This paper proposes a variable gain amplifier (VGA) with reconfigurable DC-offset cancellation (DCOC) for multi-standard applications. In this design, a cell-based design method and some bandwidth extension technologies are adopted to achieve a high data rate and a wide gain control range simultaneously. In addition, the DCOC having a tunable lower-cutoff frequency can make an optimum compromise between BER and SNR according to the specified baseband standard. The measurements show that the VGA achieves a gain control range from −6 dB to 60 dB, a bandwidth beyond 3 GHz, and a tunable lower-cutoff frequency from 0 to 300 kHz. When entering a 2 23 −1 pseudo-random bit sequence signal at 5 Gb/s, the VGA consumes 17 mW from a 1.2-V supply and the output data peak-to-peak jitter is less than 40 ps. The VGA is fabricated in a 90-nm CMOS process with a chip size (including all pads) of 0.52×0.5 mm 2

A 5-Gb/s automatic gain control amplifier with temperature compensation

This paper presents an automatic gain control (AGC) amplifier with temperature compensation for high-speed applications. The proposed AGC consists of a folded Gilbert variable gain amplifier (VGA), a dc offset canceller, inductorless post amplifiers, a linear open-loop peak detector (PD), an integrator, a symmetrical exponential voltage generator, and a compensation block for temperature stability. The novel temperature compensation scheme ensures the AGC stability and accuracy over -20°C-200°C by predicting the integrator biasing voltage based on the crucial blocks duplication technique. The proposed linear open loop PD combined with the linear-in-dB VGA manages the dB-linear error of less than 0.3 dB for the received signal strength indication (RSSI). The AGC chip is fabricated using a 0.13-μm SiGe BiCMOS technology. Consuming a power of 72 mW from a 1.2-V supply voltage, the fabricated circuit exhibits a voltage gain of 40 dB and a 3-dB bandwidth of 7.5 GHz. With a 215 - 1 pseudo-random bit sequence at 5-Gb/s, the measured peak-to-peak jitter is less than 40pspp across the -20°C-200°C temperature range. The low linear-in-dB error and the wide operating temperature range achieving the high-speed data input signal indicate the suitability of the proposed techniques for high-speed AGC amplifiers