Advances in Biomedical Devices_A comprehensive Exploration of Cardiovascular and Ophthalmic Applications

This review article discusses current technological advances in biomedical devices,emphasizing cardiovascular and ophthalmic application diagnostic,monitoring, and prosthetic instruments and systems. The scope encompasses various aspects, including implantable retinal prosthetic devices, portable device for carotid stiffness measurement, automatic identification algorithms for arteries, cuffless evaluation of carotid pulse pressure, wearable neural recording systems, and arterial compliance probes. Additionally, the paper explores advancements in pulse wave velocity measurement, real time heart rate estimation from wrist type signals, and the clinical significance of non invasive pulse wave velocity measurement in assessing arterial stiffness. The synthesis of these studies provides insights into the evolving landscape of biomedical devices, their validation, reproducibility, and potential clinical implications, emphasizing their role in enhancing diagnostics and therapeutic interventions in cardiovascular and ophthalmic domains.Comment:

PROGRAMMABLE NEURAL PROCESSING FRAMEWORK FOR IMPLANTABLE WIRELESS BRAIN-COMPUTER INTERFACES

Brain-computer interfaces (BCIs) are able to translate cerebral cortex neural activity into control signals for computer cursors or prosthetic limbs. Such neural prosthetics offer tremendous potential for improving the quality of life for disabled individuals. Despite the success of laboratory-based neural prosthetic systems, there is a long way to go before it makes a clinically viable device. The major obstacles include lack of portability due to large physical footprint and performance-power inefficiency of current BCI platforms. Thus, there are growing interests in integrating more BCI's components into a tiny implantable unit, which can minimize the surgical risk and maximize the usability. To date, real-time neural prosthetic systems in laboratory require a wired connection penetrating the skull to a bulky external power/processing unit. For the wireless implantable BCI devices, only the data acquisition and spike detection stages are fully integrated. The rest digital post-processing can only be performed on one chosen channel via custom ASICs, whose lack of flexibility and long development cycle are likely to slow down the ongoing clinical research.This thesis proposes and tests the feasibility of performing on-chip, real-time spike sorting/neural decoding on a programmable wireless sensor network (WSN) node, which is chosen as a compact, low-power platform representative of a future implantable chip. The final accuracy is comparable to state-of-the-art open-loop neural decoder. A detailed power/performance trade-off analysis is presented. Our experimental results show that: 1)direct on-chip neural decoding without spike sorting can achieve 30Hz updating rate, with power density lower than 62mW/cm2; 2)the execution time and power density meet the requirements to perform real-time spike sorting and wireless transmission on a single neural channel. For the option of having spike sorting in order to keep all neural information, we propose a new neural processing workflow that incorporates a light-weight neuron selection method to the training process to reduce the number of channels required for processing. Experimental results show that the proposed method not only narrows the gap between the system requirement and current hardware technology, but also increase the accuracy of the neural decoder by 3%-22%, due to elimination of noisy channels

Low-noise Amplifier for Neural Recording

With a combination of engineering approaches and neurophysiological knowledge of the central nervous system, a new generation of medical devices is being developed to link groups of neurons with microelectronic systems. By doing this, researchers are acquiring fundamental knowledge of the mechanisms of disease and innovating treatments for disabilities in patients who have a failure of communication along neural pathways. A low-noise and low-power analog front-end circuit is one of the primary requirements for neural recording. The main function for the front-end amplifier is to provide gain over the bandwidth of neural signals and to reject undesired frequency components. The chip developed in this thesis is a field-programmable analog front-end amplifier consisting of 16 programmable channels with tunable frequency response. A capacitively coupled two-stage amplifier is used. The first-stage amplifier is a Low-Noise Amplifier (LNA), as it directly interfaces with the neural recording micro-electrodes; the second stage is a high gain and high swing amplifier. A MOS resistor in the feedback path is used to get tunable low-cut-off frequency and reject the dc offset voltage. Our design builds upon previous recording chips designed by two former graduate stu- dents in our lab. In our design, the circuits are optimized for low noise. Our simulations show the recording channel has a gain of 77.9 dB and input-referred noise of 6.95 µV rms(Root-Mean-Square voltage) over 750 Hz to 6.9 kHz. The chip is fabricated in AMS 0.35 µm CMOS technology for a total die area of 3 x 3 mm 2 and Total Power Dissipation (TPD) of 2.9 mW. To verify the functionality and adherence to the design specifications it will be tested on Printed-Circuit-Board