3 research outputs found

    Fully differential implementation of a delta-sigma modulator based on the pseudo-pseudo differential technique

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    Flicker noise and distortion are the main limitations in biomedical applications, especially for Switched Capacitor implementations, where the flicker noise is folded into the signal band. To remove the flicker noise and increase the linearity, the Pseudo-Pseudo Differential (P2D) technique has been proposed, where a single-ended signal is processed in a differential way. This paper presents the first silicon implementation of a second order Comparator-Based Switched-Capacitor (CBSC) delta-sigma modulator based on a variation of the P2D technique. Experimental results in a standard 180 nm CMOS technology show an improvement of 10 dB in the Peak SNDR, 5 dB in the DR, and 9 dB in the SFDR over its pseudo differential counterpart, which is the preferred differential implementation for CBSC circuits. Moreover, it is achieved with a reduction in the power consumption

    A 280μW dynamic-zoom ADC with 120dB DR and 118dB SNDR in 1kHz BW

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    Micro-power ADCs with high linearity and dynamic range (DR) are required in several applications, such as smart sensors, biomedical imaging, and portable instrumentation. Since the signals of interest are then often small (tens of μν) and slow (<1kHz BW), such ADCs should also exhibit low offset and flicker noise. Noise-shaping SAR [1] and incremental ADCs [2] have been proposed for such applications, but their DR is limited to about 100dB. Although the ΔΣ modulator (ΔΣM) proposed in [3] achieves 136dB DR, it is at the expense of high power consumption (12.7mW). The incremental zoom ADC proposed in [4] combines a coarse SAR ADC and a fine ΔΣ ADC to efficiently achieve 119.8dB DR, but is limited to DC signals. The dynamic zoom ADC in [5] solves this problem, but requires external filtering to cope with out-of-band interference. This paper describes an interferer-robust dynamic zoom ADC that consumes 280μW while achieving 120.3dB DR and 118.1dB SNDR in 1kHz BW, resulting in a Schreier FoM of 185.8dB. It also achieves a maximum offset of 30μν and a 1/f corner of 7Hz. These advances are achieved by the combination of dynamic error-correction techniques, an asynchronous SAR ADC and a fully differential inverter-based ΔΣ ADC.Session 14.5 Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.Electronic Instrumentation(OLD)Applied Quantum ArchitecturesMicroelectronic
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