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Circuits and architectures for broadband spectrum channelizers with sub-band gain control
Broadband receiver architectures for full-band or concurrent multi-band reception of signals are required in several applications. One approach to implementing such receivers is a spectrum channelizer that employs a frequency-folded analog-to-digital converter (FF-ADC). The design downconverts and channelizes a broadband input signal into multiple sub-bands at baseband by employing the harmonics of non-overlapping rectangular clocks. The downconverted and aliased baseband signal in each path is digitized by a baseband ADC, referred to as a sub-ADC below, that operates with a sampling rate that is lower than the Nyquist sampling rate set by the full bandwidth of the input signal. Sub-band separation is performed through digital harmonic rejection (HR) and image rejection (IR). The design operates similar to a time-interleaved ADC, except that it significantly reduces the bandwidth requirement of the samplers. If rectangular pulse waveforms are used in the FF-ADC down-converter, all sub-bands experience nearly equal gain during frequency down-conversion. Since all sub-bands are aliased to baseband before they are separated in the digital domain, a sub-band with large relative power can reduce the sub-ADC dynamic range that is available for other sub-bands, in addition to appearing as a blocker for other sub-bands. The research presented in this dissertation addresses approaches to overcome this issue, by embedding sub-band gain control within an FF-ADC.
Chapter 2 proposes an approach that employs pulse-width-modulated local oscillator (PWM-LO) waveforms in the polyphase paths of an FF-ADC for scaling individual sub-band signal levels at baseband before digitization. The PWM-LO waveforms, which directly drive switches in each path, can be used to vary the gain in each sub-band by varying the level of harmonics in the waveforms. This is achieved by controlling the pulse-widths of the PWM-LO waveforms. This design avoids the requirement for N ×N switch matrices and variable transconductance cells in prior demonstrated approaches. The proposed architecture makes it possible to vary the spectral response of the FF-ADC with low signal-path complexity. Prediction of pulse widths for the desired harmonic, and hence the gain profile across all sub-bands, is performed using an off-chip supervised learning approach employing a neural network.
Chapter 3 presents the implementation of a spectrum channelizer employing the PWM-LO-based sub-band amplitude control. The design allows for scaling the relative gain of the sub-bands over a 20-dB range. This relaxes the compression performance of the channelizer baseband and the sub-ADC dynamic range in the presence of sub-bands with significantly higher signal levels. Gain control on individual sub-bands is performed by employing customized PWM-LO waveforms,where the PWM-LO pulses are generated using delay-locked loops (DLLs). The off-chip neural-network based learning technique for estimating the PWM symbol pulse widths required for setting the desired LO harmonic levels is described. A 1.6 GS/s spectrum channelizer IC is implemented in a 65-nm CMOS process to verify the architecture. The measured channelizer gain is 51.6-56.5 dB without gain scaling and provides a range of 37-59 dB with PWM-LO gain control. Gain-scaling at a specific harmonic improves blocker compression in an unattenuated sub-band from -34 dBm to -16 dBm. The in-band gain compression with gain-scaling also increases from -32 dBm to -17 dBm.
Chapter 4 describes a spectrum channelizer that uses voltage-mode downconversion. The approach requires a single voltage-mode input amplifier to drive the downconversion switches. Frequency-folding and sub-band gain control are achieved in a single signal path. This contrasts with the current-mode approach that requires a main FF-ADC path and a separate auxiliary path for sub-band gain control. By avoiding the requirement for an auxiliary input path, the approach presented here significantly simplifies the signal chain with identical gain-scaling capability.
The contributions of this research and scope for future related work are summarized in Chapter 5.Electrical and Computer Engineerin
Abstracts on Radio Direction Finding (1899 - 1995)
The files on this record represent the various databases that originally composed the CD-ROM issue of "Abstracts on Radio Direction Finding" database, which is now part of the Dudley Knox Library's Abstracts and Selected Full Text Documents on Radio Direction Finding (1899 - 1995) Collection. (See Calhoun record https://calhoun.nps.edu/handle/10945/57364 for further information on this collection and the bibliography).
Due to issues of technological obsolescence preventing current and future audiences from accessing the bibliography, DKL exported and converted into the three files on this record the various databases contained in the CD-ROM.
The contents of these files are:
1) RDFA_CompleteBibliography_xls.zip [RDFA_CompleteBibliography.xls: Metadata for the complete bibliography, in Excel 97-2003 Workbook format; RDFA_Glossary.xls: Glossary of terms, in Excel 97-2003 Workbookformat; RDFA_Biographies.xls: Biographies of leading figures, in Excel 97-2003 Workbook format];
2) RDFA_CompleteBibliography_csv.zip [RDFA_CompleteBibliography.TXT: Metadata for the complete bibliography, in CSV format; RDFA_Glossary.TXT: Glossary of terms, in CSV format; RDFA_Biographies.TXT: Biographies of leading figures, in CSV format];
3) RDFA_CompleteBibliography.pdf: A human readable display of the bibliographic data, as a means of double-checking any possible deviations due to conversion