Hardware Development of an Ultra-Wideband System for High Precision Localization Applications

A precise localization system in an indoor environment has been developed. The developed system is based on transmitting and receiving picosecond pulses and carrying out a complete narrow-pulse, signal detection and processing scheme in the time domain. The challenges in developing such a system include: generating ultra wideband (UWB) pulses, pulse dispersion due to antennas, modeling of complex propagation channels with severe multipath effects, need for extremely high sampling rates for digital processing, synchronization between the tag and receivers’ clocks, clock jitter, local oscillator (LO) phase noise, frequency offset between tag and receivers’ LOs, and antenna phase center variation. For such a high precision system with mm or even sub-mm accuracy, all these effects should be accounted for and minimized. In this work, we have successfully addressed many of the above challenges and developed a stand-alone system for positioning both static and dynamic targets with approximately 2 mm and 6 mm of 3-D accuracy, respectively. The results have exceeded the state of the art for any commercially available UWB positioning system and are considered a great milestone in developing such technology. My contributions include the development of a picosecond pulse generator, an extremely wideband omni-directional antenna, a highly directive UWB receiving antenna with low phase center variation, an extremely high data rate sampler, and establishment of a non-synchronized UWB system architecture. The developed low cost sampler, for example, can be easily utilized to sample narrow pulses with up to 1000 GS/s while the developed antennas can cover over 6 GHz bandwidth with minimal pulse distortion. The stand-alone prototype system is based on tracking a target using 4-6 base stations and utilizing a triangulation scheme to find its location in space. Advanced signal processing algorithms based on first peak and leading edge detection have been developed and extensively evaluated to achieve high accuracy 3-D localization. 1D, 2D and 3D experiments have been carried out and validated using an optical reference system which provides better than 0.3 mm 3-D accuracy. Such a high accuracy wireless localization system should have a great impact on the operating room of the future

Monolithic electronic-photonic integration in state-of-the-art CMOS processes

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.Cataloged from student submitted PDF version of thesis.Includes bibliographical references (p. 388-407).As silicon CMOS transistors have scaled, increasing the density and energy efficiency of computation on a single chip, the off-chip communication link to memory has emerged as the major bottleneck within modern processors. Photonic devices promise to break this bottleneck with superior bandwidth-density and energy-efficiency. Initial work by many research groups to adapt photonic device designs to a silicon-based material platform demonstrated suitable independent performance for such links. However, electronic-photonic integration attempts to date have been limited by the high cost and complexity associated with modifying CMOS platforms suitable for modern high-performance computing applications. In this work, we instead utilize existing state-of-the-art electronic CMOS processes to fabricate integrated photonics by: modifying designs to match the existing process; preparing a design-rule compliant layout within industry-standard CAD tools; and locally-removing the handle silicon substrate in the photonic region through post-processing. This effort has resulted in the fabrication of seven test chips from two major foundries in 28, 45, 65 and 90 nm CMOS processes. Of these efforts, a single die fabricated through a widely available 45nm SOI-CMOS mask-share foundry with integrated waveguides with 3.7 dB/cm propagation loss alongside unmodified electronics with less than 5 ps inverter stage delay serves as a proof-of-concept for this approach. Demonstrated photonic devices include high-extinction carrier-injection modulators, 8-channel wavelength division multiplexing filter banks and low-efficiency silicon germanium photodetectors. Simultaneous electronic-photonic functionality is verified by recording a 600 Mb/s eye diagram from a resonant modulator driven by integrated digital circuits. Initial work towards photonic device integration within the peripheral CMOS flow of a memory process that has resulted in polysilicon waveguide propagation losses of 6.4 dB/cm will also be presented.by Jason S. Orcutt.Ph.D