1 research outputs found
Reconfigurable and approximate computing for video coding
The Chapter begins with a discussion of the constraints and needs of video
coding systems. The lack in flexibility of traditional monolithic codec
specifications, not suitable to model commonalities among codecs and foster
reusability among successive codec generations/updates, was the main trigger
for the development of a new standard initiative within the ISO/IEC MPEG
committee, called reconfigurable video coding (RVC). The MPEG-RVC framework
exploits the dataflow nature behind video coding to foster flexible and
reconfigurable codec design, as well as to support dynamic reconfiguration. The
Chapter goes on to consider that the inherent resiliency of various functional
blocks (like motion estimation in the high-efficiency video coding, HEVC) and
the varying levels of user perception make video coding suitable to apply
approximate computing techniques. Approximate computing, if properly supported
at design time, allows achieving run-time trade-offs, representing a new
direction in hardware-software codesign research. The main assumption behind
approximate computing, exploited within video coding, is that the degree of
accuracy (in this case during codec execution) is not required to be the same
all the time. The final part of the Chapter attempts to put together the
concepts addressed and remarks on which are, in the authors' opinion, some
interesting research directions.Comment: Chapater of the VLSI Architectures for Future Video Coding, IET
Digital Library, 2019
(https://digital-library.theiet.org/content/books/10.1049/pbcs053e_ch9