Numerical Analysis of 3-Dimensional Scaling Rules on a 1.2-kV Trench Clustered IGBT

3-dimensional scaling rules for the cathode cells and threshold voltages of a 1.2-kV Trench Clustered IGBT (TCIGBT) are investigated using calibrated models in Synopsys Sentaurus TCAD tools. Scaling down results in an enhancement of current gain of the inherent thyristor action which reduces the forward voltage drop even more than that of a scaled Trench IGBT (TIGBT). For identical switching losses, at a scaling factor k=3, the forward voltage drop is reduced by 20% at 300K and 30% at 400K when compared to the conventional TCIGBT (k=1). Most importantly, despite its lower conduction losses than an equivalent TIGBT, a scaled TCIGBT structure can maintain its short circuit capability, due to the additional scaling principle applied to the n-well and p-well regions, maintaining the self-clamping feature. Thus, TCIGBT is a more efficient chip-for-chip, reliable replacement of a TIGBT for energy savings in applications

Numerical study of 1200V scaled field stop trench insulated gate bipolar transistor

Trench Insulated Gate Bipolar Transistors (TIGBTs) are the foundation of modern, low, medium, and high-power converters and serve as the main component in diverse power electronic applications today such as Motor drives, Induction heating, UPS, Vacuum cleaners etc. latest growth in Trench IGBTs technologies is focused on increasing its power densities and switching frequencies with the target of competing with Wide Band Gap (WBD) power devices. This thesis aims towards studying of 1.2kV scaled Field Stop Trench IGBT using numerical analysis. In this work, 1.2kV FS-TIGBT was modelled, characterised, and scaled employing the scaling principle in the literature. Towards developing and characterizing the Trench IGBT model, a Sentaurus Technology Computer Aided Design (TCAD) that houses a written program specifically meant and designed for semiconductor physics Finite Element Method (FEM) simulation was deployed. Literature review regarding FEM simulations was carried out as well as the physics involved in IGBT operation. Static and dynamic characteristics of the developed Trench IGBT model was evaluated in depth and a comparison was drawn against the scaled device and it was confirmed that the scaled device k=3 have an improved static (I-V) characteristics mainly due to enhanced Injection Enhancement (IE) effect. For the both conventional and scaled devices (k=1 and k=3), the forward on-sate voltage drop Vce(sat) at current rating of 40A are 1.6V for k1 and 1.4V for k3 at 300K. At the same time, the values for the V_(ce(sat)) for the both devices were increased to 1.9V for k1 and 1.6V for k3 at the junction temperature of 400K for the same current rating. For the scaled device k=3, the on – state voltage drop V_(ce(sat)) was lowered by 12.5% at 300K and 16% at 400K respectively. The increase in collector emitter saturation voltage Vce(sat) at high temperature is due to increase in channel resistance. However, it was confirmed in the course of the study that the scaled device k=3 suffers limitation of short circuit capability and during this period, it has been noticed an occurrence of oscillation and overshoot in the gate-emitter voltage threatening the robustness of the device. The limitation in short circuit capability is due to Collector Induce Barrier Lowering (CIBL) effect caused by conductivity modulation in the middle of the mesa region (channel inversion layer) and this led to increase in the channel conductivity and thus result to current un-saturation. In overcoming the limitation of short circuit capability posed by the scaled device, a new scaled device was proposed. The depth of the p+ emitter in the p-base region for the proposed device was slightly increased in order to mitigate the effect of CIBL in the mesa region and ensure current saturation. The optimal depth of the p+ emitter which gave the expected result in terms of current saturation was 0.24um. Thus, the short circuit capability was improved while maintaining same on-state voltage drop and turn-off losses for the proposed and conventional scaled devices

High Efficiency IGBTs through Novel Three-Dimensional Modelling and New Architectures

New Insulated Gate Bipolar Transistor (IGBT) designs are reliant on simulation tools, such as Sentaurus technology computer-aided design (TCAD) models, which allow for rapid device development that could not be achieved by manufacturing prototypes due to the cost and time associated with fabrication. These simulations are, though, computationally expensive and typically most design engineers develop these TCAD models only in two dimensions. This leads to inaccuracies in the model output since manufactured transistors are inherently three-dimensional (3D). Based upon a commercial IGBT, this thesis begins by outlining the development of a 3D TCAD model using design details provided by the manufacturer. Large variations between the experimental data from the manufactured device and the simulation model lead to the discovery of widespread birds-beaking within the IGBT – an uncontrollable processing defect that the manufacturer was unaware of. This thesis presents a new simulation technique to account for this processing error while minimising computational effort and investigates the consequence of this birds-beak on the reliability of the device. The verified 3D IGBT model was also used to determine an optimum cell design that considered critical 3D effects omitted from previous studies. An extensive literature review for the Reverse-Conducting IGBT (RC-IGBT) is provided. It is shown that despite the benefits of the RC-IGBT, the device suffers from many undesirable design trade-offs that have prevented its widespread use. The RC-IGBT designs that have currently been proposed in literature, either present a trade-off in performance, an inability to be manufactured, or a requirement for a custom gate drive. This thesis presents a new RC-IGBT concept, the ‘Dual Implant SuperJunction (SJ) RC-IGBT’ that addresses these concerns and is manufacturable using current state of the art techniques. The concept and proposed manufacturing method enables, for the first time, a full SuperJunction structure to be achieved in a 1.2kV device. In addition, an investigation into a coordinated switching scheme using both a silicon IGBT and silicon-carbide MOSFET was undertaken, which aimed to improve turn-off losses within the IGBT without sacrificing on-state losses. Thermal modelling of the power devices switching under inductive load was explored as the system was optimised to use a SiC MOSFET in excess of its nominal ratings, reducing the overall system cost.EPSRC Doctoral Training Partnership scheme (grant RG75686

Testing Methodologies for Power Electronic Devices With focus on MOSFETs and IGBTs

Metal Oxide Semiconductor Field Effect Transistor (MOSF ET s) and Insu-lated Gate Bipolar Transistor (IGBT s); both are the state-of-the-art semiconductor switching devices.In this study an in-depth study of Metal Oxide Semiconductor (MOS) physics, cell structure and electrical characterization of MOSFETs and IGBTs has been con-ducted. The aim is to achieve a further improvement on the reliability and rugged-ness of these power electronic devices using findings of the research. These power devices have an extensive industrial and domestic applications, they are the building blocks of nearly all types of power electronic circuits, control systems and advanced digital data storages, laptop and phone chargers, motor drives in electric vehicle, PV converters, Wind converters, industrial heaters. Power electronic monitoring systems including DC to DC converters, DC to AC inverters, AC to DC rectifiers and AC to AC converter.Silvaco simulation and MATLAB modeling enabled the research to gain a vivid understanding of device operation MOS physics and all relevant electrical charac-teristics. The practical experiment side of the research includes high power semi-conductor devices characterization; testing of fabricated discrete devices comprising:(200V, 40A Silicon MOSFET; 1.2KV, 19A Silicon Carbide MOSFET; 600V, 20A and 40A Silicon IGBT; 1.2KV, 25A Silicon IGBT). Consequently, the research work gained an insight to the semiconductor switching latest technologies that are useful for the optimization consideration of power electronic devices. Observations from published journals enabled to see the existing relevant research gaps and works car-ried out by other scientists around this field area. Silicon is the working material for this master’s by research thesis. Moreover, this paper also looks into the great benefits of using silicon-carbide as a material for the next generation technological innovations.Therefore, this research contributes towards device optimization in the following way:Firstly, at a single cell design level. Shielded trench gate geometry architecture outperforms planar gate structure. Secondly, fabricating using a Wide-band-gap material (WBG) enhances device performance greatly

THE CURRENT STATUS OF POWER SEMICONDUCTORS

Trends in the design and technology of power semiconductor devices are discussed on the threshold of the year 2015. Well established silicon technologies continue to occupy the most of applications thanks to the maturity of switches like MOSFET, IGBT, IGCT and PCT. Silicon carbide (SiC) and gallium nitride (GaN) are striving to take over that of the silicon. The most relevant SiC device is the MPS (JBS) diode, followed by MOSFET and JFET. GaN devices are represented by lateral HEMT. While the long term reliability of silicon devices is well trusted, the SiC MOSFETs and GaN HEMTs are struggling to achieve a similar confidence. Two order higher cost of SiC equivalent functional performance at device level limits their application to specific cases, but their number is growing. Next five years will therefore see the co-existence of these technologies. Silicon will continue to occupy the most of applications and dominate the high-power sector. The wide bandgap devices will expand mainly in the 600 - 1200 V range and dominate the research regardless of the voltage class

Self-Turn-on-Free 5V Gate Driving for 1200V Scaled IGBT

Negative biasing of the gate voltage in a scaled insulated gate bipolar transistor (IGBT) during the off-state was modeled and found to be effective against self-turn-on failures. The required self-turn-on-free criteria were verified experimentally.31st IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD 2019), 19-23 May 2019, Shanghai, Chin

Prognostics and health management of power electronics

Prognostics and health management (PHM) is a major tool enabling systems to evaluate their reliability in real-time operation. Despite ground-breaking advances in most engineering and scientific disciplines during the past decades, reliability engineering has not seen significant breakthroughs or noticeable advances. Therefore, self-awareness of the embedded system is also often required in the sense that the system should be able to assess its own health state and failure records, and those of its main components, and take action appropriately. This thesis presents a radically new prognostics approach to reliable system design that will revolutionise complex power electronic systems with robust prognostics capability enhanced Insulated Gate Bipolar Transistors (IGBT) in applications where reliability is significantly challenging and critical. The IGBT is considered as one of the components that is mainly damaged in converters and experiences a number of failure mechanisms, such as bond wire lift off, die attached solder crack, loose gate control voltage, etc. The resulting effects mentioned are complex. For instance, solder crack growth results in increasing the IGBT’s thermal junction which becomes a source of heat turns to wire bond lift off. As a result, the indication of this failure can be seen often in increasing on-state resistance relating to the voltage drop between on-state collector-emitter. On the other hand, hot carrier injection is increased due to electrical stress. Additionally, IGBTs are components that mainly work under high stress, temperature and power consumptions due to the higher range of load that these devices need to switch. This accelerates the degradation mechanism in the power switches in discrete fashion till reaches failure state which fail after several hundred cycles. To this end, exploiting failure mechanism knowledge of IGBTs and identifying failure parameter indication are background information of developing failure model and prognostics algorithm to calculate remaining useful life (RUL) along with ±10% confidence bounds. A number of various prognostics models have been developed for forecasting time to failure of IGBTs and the performance of the presented estimation models has been evaluated based on two different evaluation metrics. The results show significant improvement in health monitoring capability for power switches.Furthermore, the reliability of the power switch was calculated and conducted to fully describe health state of the converter and reconfigure the control parameter using adaptive algorithm under degradation and load mission limitation. As a result, the life expectancy of devices has been increased. These all allow condition-monitoring facilities to minimise stress levels and predict future failure which greatly reduces the likelihood of power switch failures in the first place

Shoot-through protection for an inverter consisting of the next-generation IGBTs with gate impedance reduction

Attention has been paid to the next-generation IGBT toward CMOS compatible wafer processes, which can be driven by a 5-V logic level due to its low threshold gate voltage. This low threshold voltage makes the so-called shoot-through fault severer. Even though the switching speed of the IGBT is intentionally reduced, the shoot-through fault can happen. This paper presents shoot-through protection for an inverter consisting of the next-generation IGBTs with gate impedance reduction. Theoretical analysis reveals the criterion of the gate impedance with taking parasitic parameters of the inverter into account

In-situ Health Monitoring Applied to High-Voltage IGBT Power Modules

PhD ThesisThis thesis addresses an important issue of identifying insulated gate bi-polar transistor (IGBT) chip failures in multichip IGBT power modules. IGBT power modules are the dominant semiconductor devices of choice in high-voltage (HV) high-power converter applications which include domestic, commercial, automotive, railway, marine, aerospace and industrial applications. Commonly available HV IGBT power modules in the market are rated at 3.3 kV, 4.5 kV and 6.5 kV. These HV IGBT modules comprise several IGBT chips connected in parallel to achieve high-current capability; hence they are also known as multichip IGBT power modules. IGBT power modules are not flawless. The increased complexity of IGBT power module construction and inhomogeneous semiconductor chips make HV power modules less reliable. IGBT chips and electrical and mechanical interface material within the modules wear out and fail due to thermal cycling, operating environment or mishandling. IGBT failures while in application have repercussions on safety and failure costs. Thus the reliability of IGBTs while in their application is crucial especially in HV applications which comprise critical and large loads. To improve the reliability, an in-situ (online) health monitoring interface for HV IGBT power modules is proposed in this thesis. Two distinct advantages of in-situ IGBT health monitoring are that it allows IGBT module replacement prior to complete failure thus reducing safety and reliability risks. The second advantage is that the interval time for IGBT maintenance work can be tailored towards the real degradation rather an obligatory fixed time interval thus reducing maintenance costs. In large power modules, it is common to have IGBT chips as well as anti-parallel diode chips within the power module. This research focusses only on the health monitoring of the IGBT chips and not the diode chips. The main reason is that IGBT chips experience higher thermal stresses compared to diodes hence IGBT chips are more susceptible to failures compared to diode chips. In practice, IGBT chip failures are accompanied by a change in junction temperature. Thus this thesis proposes the use of temperature- sensitive electrical parameters (TSEPs) for in-situ health monitoring of IGBT power modules. Following a comparison of twelve traditional online TSEPs from literature and five new TSEPs proposed in this thesis, this thesis employs a novel TSEP, gate-emitter prethreshold voltage (VGE(pre-th)) as a health-sensitive parameter (HSP) for chip failure detection in multichip HV IGBT power modules. A VGE(pre-th) online chip loss monitoring circuit has been successfully implemented on a commercially available IGBT gate driver. VGE(pre-th) is measured at a fixed pre-determined instant of the gateemitter voltage (VGE) between the VGE zero-crossing (VGE(0)) and threshold voltage (VGE(th)) during IGBT turn-on. VGE(pre-th) requires low hardware with only a voltage sensor and a counter. Since it is based on the low-voltage (LV) gate side rather than the HV collector side of IGBT, VGE(pre-th) does not require HV isolation or HV insulation. Simulation and experimentation of 16-chip 3.3kV 800A DIM800NSM33-F IGBT power modules from Dynex Semiconductor Limited (Ltd) have shown that VGE(pre-th) has a good accuracy and repeatability; a linear sensitivity of 500 mV/chip loss with IGBT chip failures; a linear virtual junction temperature (Tvj) sensitivity of -2.2 mV/°C and tracks the highest chip temperature. It has thus been concluded that VGE(pre-th) can be used for both Tvj and IGBT chip failure monitoring in HV IGBT power modules. VGE(pre-th) can be tested during normal IGBT turn-on operation or during the off-state of the IGBT. In both cases the same information about temperature and loss of chip number can be detected which makes VGE(pre-th) more versatile than any other TSEP or HSP.Engineering and Physical Sciences Research Council (EPSRC), Newcastle University