Atomic-scale precision in silicon plasma etching is indispensable for the fabrication of next-generation three-dimensional (3D) semiconductor devices. Yet plasma-assisted atomic layer etching (PA-ALE) continues to be limited by low throughput, poor self-limiting behavior, and an incomplete understanding of surface kinetics. My research tries to address these challenges through a systematic study performed in a modified continuous-wave (CW) inductively coupled plasma (ICP) reactor. Time-resolved, in-situ optical emission spectroscopy (OES) is established as a quantitative tool of surface reactions during ALE cycles employing Cl₂, HBr, and Br₂ chemistries. The measurements show that SiCl₂ and SiCl constitute the primary products in Cl₂-based ALE. Two process sequences—gas dosing and plasma gas dosing—are explored and compared: pseudo-self-limiting behavior emerges in HBr plasma gas dosing cycles, whereas Br₂ have greater Br surface coverage and higher etch rates under gas-dosing conditions compared to HBr. Because both Br₂ and HBr have high sticking coefficients, gas residence time experiments reveal a two-stage purge consisting of a volume-limited decay followed by wall retention limited desorption; wall passivation via temperature control, Ar/SF₆/O₂ conditioning, and increased total flow substantially shortens the wall retention time. Moreover, fast-pulsed substrate bias with continuous gas flow effectively decouples the dose and etch steps, eliminating mechanical gas-pulsing hardware and markedly increasing throughput. Simultaneously tracking the ALE percentage and the bias-on integrated intensity of dominant OES lines enables evaluation of both self-limiting fidelity and etch rate. Collectively, this work (i) elucidates the primary reaction products and pathways in Si ALE for multiple halogen chemistries, (ii) delivers robust, high-throughput recipes that achieve sub-nm precision with cycle times below 2 s, and (iii) provides diagnostic and hardware guidelines transferable to other ICP tools. These advances expedite the transition of PA-ALE from lab to high-volume manufacturing, making a further step to achieve damage-free patterning of sub-10 nm features for future logic and memory devices
Is data on this page outdated, violates copyrights or anything else? Report the problem now and we will take corresponding actions after reviewing your request.