Technical Note—Slowdown in the Energy Efficiency of Analog-to-Digital Converters and a Compressed-Sensing-Based Solution

Abstract

Power consumption remains a critical bottleneck in the design of sensor systems. To investigate power consumption problems in sensor circuits, we surveyed the latest developments in analog-to-digital converter (ADC) integrated circuits, which are indispensable components of sensor front ends. An evaluation based on the Walden figure-of-merit, using data from ADCs presented at the International Solid-State Circuits Conference, revealed a slowdown in the energy-efficiency improvement of state-of-the-art ADCs. To overcome this limitation, we are developing a compressed-sensing-based solution: a lowpower sensing approach that combines random undersampling with compressed-sensing reconstruction. A prototype wireless electroencephalogram system implemented on a general-purpose microcontroller reduces both sampling activity and radio duty cycle, achieving continuous operation at 72 μWwhile maintaining signal fidelity. These efforts are expected to pave the way for next-generation ultralow-power and energy-harvesting sensor networks