A nanoanalytical investigation of high-k dielectric gate stacks for GaAs based MOSFET devices

Longo, P.; Craven, A.J.; Holland, M.C.; Moran, D.A.J.; Thayne, I.G.

oai:eprints.gla.ac.uk:34895

A nanoanalytical investigation of high-k dielectric gate stacks for GaAs based MOSFET devices

Authors: P. Longo
A.J. Craven
M.C. Holland
D.A.J. Moran
I.G. Thayne
Publication date: 1 March 2009
Publisher
Doi

Abstract

In this paper a quantitative determination of the elemental distributions across a similar to 10 nm Ga2O3/GdGaO layer with Pt metal gate cap on top of an InGaAs/AlGaAs/GaAs substrate is presented. Some effects of annealing on the elemental distribution across the Ga2As/Ga(2)O(3)GGaO oxide layer are described. The paper also discusses the analysis of the interface GaAs/Ga2O3/GGO at a sub-nm level by high-resolution HAADF STEM imaging

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oai:eprints.gla.ac.uk:34895

Last time updated on 08/10/2012

This paper was published in Enlighten.

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