Synergistic Timing Speculation for Multi-Threaded Programs

Abstract

Timing speculation is a promising approach to increase the processor performance and energy efficiency. Under timing speculation, an integrated circuit is allowed to operate at a speed faster than the rated speed specified by its vendor. However, doing so might result in an incorrect execution. Consequently, as long as the processor is equipped with an error detection and recovery mechanism, its performance can be increased and/or energy consumption reduced beyond that achievable by any other conventional operation. While many past works have dealt with timing speculation within a single core, in this work, a new direction is being uncovered by exploring timing speculation for a multicore processor executing a parallel, multi-threaded application. It is observed that during the execution of a multi-threaded program, there is a significant variation in circuit delay characteristics across different threads. Synergistic Timing Speculation (SynTS) is proposed to exploit this variation to jointly optimize the energy and execution time of the many-core processor. The experimental analysis shows significant performance improvement and savings in energy, compared to existing timing speculation schemes