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Computing on Knights Architecture (COKA)

By S. F. Schifano and R. Tripiccione


COKA plans to study possible ways to efficiently use up-coming Intel many-core MIC architectures for applications relevant for theoretical physics and for triggering and data-analysis for HEP experiments. MIC systems, developed as co-processor accelerators, will be available to the mass-market by the end of 2012. It is now well clear that in the near future performance gains in processing will mainly come from many-core processing architectures; this trend has already emerged in the development of GP-GPUs while massively many core processors (such as the MIC architectures) are forecast for the near future. For this reason, we consider it important to start to investigate performances of the MIC systems as early as possible, and develop programming methodologies to effectively use all kinds of parallelism available on the processor. COKA plans to address these issues, investigating the performances of applications relevant both in the fields of theoretical and experimental physics. For the first class we plan to consider Lattice Boltzmann simulation programs, Monte Carlo simulations of Spin Glass systems, and later Lattice QCD. For the latter, we address applications of data-analysis and trigger computing. As a final goal we plan to assess if MIC architectures can be used as building blocks to develop massively parallel systems for scientific computing

Year: 2014
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