SEU design considerations for MESFETs on LT GaAs

Abstract

The article of record as published may be found at http://dx.doi.org/10.1109/23.659047IEEE Transactions on Nuclear Science, V. 44, No. 6, pp. 2282-2289, December 1997Computer simulation results are reported on transistor design and single-event charge collection modeling of metal­ semiconductor field effect transistors (MESFETs) fabricated in the Vitesse H-GaAsIII® process on Low Temperature grown (LT) GaAs epitaxial layers. Tradeoffs in Single Event Upset (SEU) immunity and transistor design are discussed. Effects due to active loads and diffusion barriers are examined.U.S. Navy Space and Naval Warfare Systems Comman