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A DETAILED MODEL FOR A HIGH-MIX LOW-VOLUME ASIC FAB

By S. Jain, R. R. Creasey, J. Himmelspach, K. P. White, M. Fu, Mike Gissrau and Oliver Rose

Abstract

Looking for new improvement options such as new dispatching rules of an existing semiconductor fabrication facility, a detailed model is indispensable to check the data quality as well as detecting main influences of the facility and finally testing the new optimization approaches. In this paper, we describe the whole modeling process starting from the data acquisition to the verification and validation of the resulting model. In this study, the modeling tool AnyLogic 6 is used. The evaluation reveals the importance of a reliable factory database. In addition, we show first ideas about automated model generation. An other important problem is the validation of the model against real factory performance indicators.

Year: 2014
OAI identifier: oai:CiteSeerX.psu:10.1.1.416.6487
Provided by: CiteSeerX
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