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• Residue Codes • Spatial Redundancy • Temporal Redundancy Feature Upsizing EDC/ECC and Residue Codes (ALU/FPU) Spatial and Temporal Redundancy (Interleaved) Parity Single-bit Upset

By Sponsored Src, Lukasz G. Szafaryn, Kevin Skadron and Brett H. Meyer


Area covered by a 2um particle strike radius with respect to the area of two 3-bit registers at various technology nodes [1] As devices become smaller, particle strike radius affects more circuit components In addition to storage (SRAM) circuits, it is now becoming a concern for logic (combinational/sequential) components Single particle strike can cause a multi-bit soft error that affects bits in the same or adjacent component(s

Year: 2014
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