In 2005 there was a historic change of direction in the computer industry: all microprocessor companies announced that their future products would be chip-scale multiprocessors (CMPs), and that future performance improvements would rely on software-specified core-level parallelism rather than depending entirely on software-transparent instruction-level parallelism. In doing so, the semiconductor industry has made a bold bet that a satisfactory solution to the general-purpose parallel programming problem will emerge, despite slow progress in previous decades of research. This disruptive sea change has both the software and hardware industries retooling for a future of commodity parallel computing. However, at this point there is no consensus on the correct direction for moving forward in parallel computing. All components of the computer system, from the programming models, compilers, runtime environments, operating systems, and hardware architecture are being examined in the quest to make parallel execution more generally applicable. Being able to experiment with co-developed hardware and software concepts—rather than living within the confines of traditional hardware-software separations—is much more likely to produce the necessary breakthroughs. Unfortunately, the prevailing simulation-driven architecture and microarchitecture exploration methodology makes hardware-software co-design virtually impossible. Accurate software simulators capable of comparing architectura
To submit an update or takedown request for this paper, please submit an Update/Correction/Removal Request.