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Synthesis of Single-Output Space Compactors with Application to Scan-based IP Cores

By Bhargab B. Bhattacharya, Alexej Dmitriev, Bhargab B. Bhattacharya Alexej Dmitriev, Michael Gössel and Krishnendu Chakrabarty


This paper addresses the problem of space compaction of test responses of combinational and scan-based sequential circuits. It is shown that given a precomputed test set T , the test responses at the functional outputs of the given circuit-under-test (CUT) can be compacted to a single periodic output, with guaranteed zero-aliasing. The method is independent of the fault model and the structure of the CUT, and uses only the knowledge of the test set T and the corresponding fault-free responses---it is particularly suitable for intellectual property (IP) cores. A new concept of distinguishing outputs and characteristic response function is utilized for synthesizing the compactor. Relevant experimental results on hardware overhead for several ISCAS circuits are presented. 1 Introduction Space compaction, which refers to the problem of reducing a wide data stream to a narrow signature stream, is commonly used for test response compression. Atypical space compaction scheme for a general c..

Year: 2002
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