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Low Power Approach for Decimation Filter Hardware Realization

By Kar Foo Chong, Pradeep K. Gopalakrishnan and T. Hui Teo

Abstract

Abstract—There are multiple ways to implement a decimator filter. This paper addresses usage of CIC (cascaded-integrator-comb) filter and HB (half band) filter as the decimator filter to reduce the frequency sample rate by factor of 64 and detail of the implementation step to realize this design in hardware. Low power design approach for CIC filter and half band filter will be discussed. The filter design is implemented through MATLAB system modeling, ASIC (application specific integrated circuit) design flow and verified using a FPGA (field programmable gate array) board and MATLAB analysis. Keywords—CIC filter, decimation filter, half-band filter, lo

Topics: power
Year: 2013
OAI identifier: oai:CiteSeerX.psu:10.1.1.307.9618
Provided by: CiteSeerX
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