Abstract—A fully integrated 1.175–2-GHz differentially tuned frequency synthesizer aimed for digital video broadcasting-terrestrial tuners is implemented in a 0.18- m CMOS process. To maintain phase-noise optimization and loop stability over the entire output frequency range, techniques of constant loop bandwidth are proposed. The voltage-controlled oscillator gain VCO and band step res are both maintained by simultaneously adjusting the sizes of switched capacitors and varactors. Charge pump current CP is programmed to compensate the variation of the division ratio. The measured results show an in-band phase noise of 97.6 dBc Hz at a 10-kHz offset and an integrated phase error of 0.63 from 100 Hz to 10 MHz. The measured variations of VCO and res are less than 12.5 % and 4.5%, respectively. The variations of the measured phase noise at 10-kHz and 1-MHz frequency offsets are less than 1 dB. The measured 3-dB closed-loop bandwidth is 110 kHz and the variation is less than 9%. The chip draws 10-mA current from a 1.8-V supply while occupying a 2.2-mm2 die area. Index Terms—Frequency synthesizer, loop bandwidth, loop gain, phase noise, voltage-controlled oscillator (VCO) gain, wideband. I
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