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Layout-constrained Retargeting of Analog Blocks

By R. Castro-lópez, F. V. Fernández, M. Delgado-restituto, F. Medeiro and A. Rodríguez-vázquez


This paper introduces a complete methodology for retargeting of transistor-level circuits to different sets of specifications. By careful integration of the device sizing and layout generation tasks, fully functional designs are generated in a few minutes of CPU time. The methodology is illustrated via the retargeting of a fully-differential Miller-compensated two-stage operational amplifier for a new set of specifications. 1

Year: 2011
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