Location of Repository

Interest

By 

Abstract

in high-level synthesis tools for FPGAs is intensifying as FPGAs and their applications grow larger and more complex. Prospective users want to understand how well high-level synthesis tools work, both in terms of usability and quality of results. To meet this need, BDTI launched the BDTI High-Level Synthesis Tool Certification Program™. This program evaluates high-level synthesis tools used to implement demanding digital signal processing applications on FPGAs. This white paper presents detailed results of BDTI’s analysis of the AutoESL AutoPilot high-level synthesis tool used in conjunction with Xilinx RTL tools to target a Xilinx Spartan-3A DSP 3400 FPGA. We discuss the ease of use, productivity, and quality of results obtained using AutoPilot compared to implementing the same application on a DSP processor. We also compare AutoPilot quality of results vs. traditional RTL FPGA design. Our findings will be surprising to many—and may indicate a major shift on the horizon for FPGA and DS

Year: 2011
OAI identifier: oai:CiteSeerX.psu:10.1.1.187.2233
Provided by: CiteSeerX
Download PDF:
Sorry, we are unable to provide the full text but you may find it at the following location(s):
  • http://citeseerx.ist.psu.edu/v... (external link)
  • http://www.bdti.com/MyBDTI/pub... (external link)
  • Suggested articles


    To submit an update or takedown request for this paper, please submit an Update/Correction/Removal Request.