This application note describes a reference system that tests the operation of the OPB CAN Core in Loopback mode. The reference system contains four cores. This application note describes the building of a system containing the OPB CAN, the port connections between different cores and the clocking for the OPB CAN and OPB DDR cores. A basic description of the software application provided with the reference system is also given. This reference system is targeted for the Xilinx SP305 Rev B board
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