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DMA-basedPrefetchingforI/O-IntensiveWorkloads ontheCellArchitecture

By M. Mustafa Rafique, Ali R. Butt and Dimitrios S. Nikolopoulos

Abstract

Recent advent of the asymmetric multi-core processors such as Cell Broadband Engine (Cell/BE) has popularized the use of heterogeneous architectures. A growing body of research is exploring the use of such architectures, especially in High-End Computing, for supporting scientific applications. However, prior research has focused on use of the available Cell/BE operating systems and runtime environments for supporting compute-intensive jobs. Data and I/O intensive workloads have largely been ignored in this domain. In this paper, we take the first steps in supporting I/O intensive workloads on the Cell/BE and deriving guidelines for optimizing the execution of I/O workloads on heterogeneous architectures. We explore various performance enhancing techniques for such workloads on an actual Cell/BE system. Among the techniques we explore, an asynchronous prefetching-based approach, which uses the PowerPC core of the Cell/BE for file prefetching and decentralized DMAs from the synergistic processing cores (SPE’s), improves the performance for I/O workloads that include an encryption/decryption component by 22.2%, compared to I/O performed naïvely from the SPE’s. Our evaluation shows promising results and lays the foundation for developing more efficient I/O support libraries for multi-core asymmetric architectures

Topics: C.1.2 [Processor Architecture, Multiple Data Stream Architecture, D.4.4 [Operating Systems, Input/output GeneralTerms Design, Experimentation, Performance Keywords Cell Broadband Engine, High-Performance Computing, I/O Intensive Workloads
Year: 2009
OAI identifier: oai:CiteSeerX.psu:10.1.1.146.225
Provided by: CiteSeerX
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