We describe an approach for formally linking a symbolic state enumeration system and a theorem proving system based on a verified version of the former. It has been realized using the HOL system and a simplified version of the MDG system. It involves the following three steps. Firstly, wehave verified aspects of correctness of a simplified version of the MDG system. We have made certain that the semantics of a program is preserved in those of its translated form. Secondly, we have provided a formal linkage between the MDG system and the HOL system based on a set of theorems, which formally import MDG verification results into HOL theorems. Thirdly, wehave combined the translator correctness and importation theorems to allow MDG verification results to be imported in terms of a high level language (MDG-HDL) rather than low level decision diagrams. We also summarize a general method of the stronger consistency theorem to prove design implementations against respective specifications. The feasibility of this approach is demonstrated in a case study that integrates two applications: hardware verification (in MDG) and usability verification (in HOL). A single HOL theorem is proved that integrates the two results
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