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Timing-Logic Derating Computation Using Event Propagation Probabilities

By Hossein Asadi

Abstract

Abstract—Timing derating is one of the key factors to compute the soft error rate of a sequential circuit. We present a very fast and accurate approach based on enhanced static timing analysis and signal probability to estimate the probability of latching an incorrect value in the system bistables (timing derating). Experimental results and comparison with Monte-Carlo simulations show that the accuracy of our approach is within 2 % of the simulation-based method while orders of magnitude faster. I

Year: 2009
OAI identifier: oai:CiteSeerX.psu:10.1.1.135.7082
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