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Automatic Delay Calibration Method for Multi-channel CMOS Formatter

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Abstract

This paper describes the technique used for automatically calibrating vernier delay steps in Credence CMOS formatter--RIC/DICMOS. Embedded within the timing generation IC, RIC/DICMOS provides formatted levels and internal strobe markers for eight independent pinelectronics channels at up to 800 Mbps with +/- 81ps accuracy. Utilizing the on-chip, run-time auto-calibration circuit, all eight RIC/DICMOS vernier channels can be calibrated in parallel nearly 500 times faster than the prior generation formatters. Furthermore, the same calibration circuit can also provide 16-bit time-period or frequency counts for upto eight independent off-chip signals.

Year: 2009
OAI identifier: oai:CiteSeerX.psu:10.1.1.134.9381
Provided by: CiteSeerX
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