S bility with minimal cost and softwarehardware overheads. Here, we uccessful interprocessor communication, a key factor in the design of any multiprocessing system, requires high bandwidth and relia-present such a communication scheme. It features simplicity, speed, modularity, and configurability to multiprocessing systems such as linear arrays, triangular arrays, meshes, systolic trees, and hypercubes. Communication between any two processors in this scheme takes place through a common memory, independently accessible by both processors involved. The interprocessor interconnection scheme in a multiprocessor system directly affects system throughput and has a bearing on the modularity, reliability, and overall system performance. Yalamanchili and Aggarwal discussed the importance of the processor interconnection scheme when they characterized the capabilities of a multiprocessing system.' Various interconnection schemes have been suggested for message passin
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