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Effects of Locking and Synchronization on Future Large Scale CMP Platforms

By Jaideep Moses, Ramesh Illikkal, Li Zhao, Srihari Makineni and Don Newell


Abstract – As we enter the era of large-scale Chip Multi-Processing (CMP) systems, evaluating architectures and projecting performance for commercial workloads on such systems is becoming increasingly important. One of the major areas of concern for Multi-Socket SMP systems has been the detrimental effects of Locking and Synchronization (L&S) overheads. However, the lower on-die interconnect latency and higher available bandwidth in CMP systems can change the effects of L&S dramatically. We wanted to analyze and study these effects. Towards this goal, we built a flexible, fast and accurate platform simulation framework called ManySim, and used this to study effects of locking and synchronization. We demonstrate that the CMP architecture outperforms the multi-socket architecture due to reduced L&S overheads, making the CMP architecture highly scalable and allowing it to almost reach the limits of Amdahl’s law. I

Year: 2009
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