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1. INTRODUCTION Recent research has demonstrated that values produced by executing instructions exhibit a high degree of value locality, that is, multiple executions of the same instruction often produce the same value [Gabbay et al. 1997; Lipasti et al. 1996]. Value locality has been exploited in the design of value reuse and prediction mechanisms for superscalar processors

Topics: Categories and Subject Descriptors, B.3.2 [Memory Structures, Design Styles--Cache memories, B.7.1 [Integrated Circuits, Type and Design Styles--Input/Output Circuits General Terms, Design, Measurement, Performance Additional Key Words and Phrases, Frequently occurring values, value profiling, encoding techniques, low power data bus, low power data cache
Year: 2009
OAI identifier: oai:CiteSeerX.psu:10.1.1.134.5167
Provided by: CiteSeerX
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