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HARDWARE CO-PROCESSORS FOR REAL-TIME AND HIGH-QUALITY H.264/AVC VIDEO CODING

By M. Martina, G. Masera, L. Fanucci and S. Saponara

Abstract

Real-Time and High-Quality video coding is gaining a wide interest in the research community, mainly for entertainment and leisure applications. Furthemore H.264/AVC, the most recent standard for high performance video coding, can be successfully exploited in such a critical scenario. The need for high-quality imposes to sustain up to tens of Mbits/s. To that purpose in this paper optimized architectures for H.264/AVC most critical tasks, Motion Estimation (ME) and Context Aware Binary Arithmetic Coding (CABAC) are proposed. Post synthesis results on a 0.18   m standard cells technology show that the proposed architectures can actually process in real time 720x480 video sequences at 30 Hz and grant more than 20Mbits/s in the simplest configuration. Keywords: Video coding, H.264/AVC, Hardware architectures, motion estimation, entropy code

Year: 2009
OAI identifier: oai:CiteSeerX.psu:10.1.1.134.3529
Provided by: CiteSeerX
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