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Exploiting Eager Register Release in a Redundantly Multi-Threaded Processor

By et al. Niti Madan

Abstract

Due to shrinking transistor sizes and lower supply voltages, transient faults (soft errors) in computer systems are projected to increase by orders of magnitude. Fault detection and recovery can be achieved through redundancy. Redundant multithreading (RMT) is one attractive approach to detect and recover from these errors. However, redundant threads can impose significant performance overheads by competing with the main program for resources such as the register file. In this paper, we propose using eager register release in the main program thread by exploiting the availablity of register values in the trailing thread’s register space. This performance optimization can help support a smaller register file and potentially reduce register file access time, power consumption, and increase its immunity towards soft errors

Topics: Reliability, redundant-multithreading, register file
Year: 2006
OAI identifier: oai:CiteSeerX.psu:10.1.1.133.9563
Provided by: CiteSeerX
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