Skip to main content
Article thumbnail
Location of Repository

HiSIM: Hierarchical Interconnect-Centric Circuit Simulator

By Tsung-hao Chen, Jeng-liang Tsai, Charlie C. -p. Chen, Tanay Karnik and Synopsys Inc


To ensure the power and signal integrity of modern VLSI circuits, it is crucial to analyze huge amount of nonlinear devices together with enormous interconnect and even substrate parasitics to achieve the required accuracy. Neither traditional circuit simulation engines such as SPICE nor switch-level timing analysis algorithms are equipped to handle such a tremendous challenge in both efficiency and accuracy. In this paper, we establish a solid framework that simultaneously takes advantage of a novel hierarchical nonlinear circuit simulation algorithm and an advanced largescale linear circuit simulation method using a new predictorcorrector algorithm. Under solid convergence and stability guarantees, our simulator, HiSIM, a hierarchical interconnectcentric circuit simulator, is capable of handling the postlayout RLKC power and signal integrity analysis task efficiently and accurately. Experimental results demonstrate over 180X speed up over the conventional flat simulation method with SPICE-level accuracy. 1

Year: 2008
OAI identifier: oai:CiteSeerX.psu:
Provided by: CiteSeerX
Download PDF:
Sorry, we are unable to provide the full text but you may find it at the following location(s):
  • (external link)
  • (external link)
  • Suggested articles

    To submit an update or takedown request for this paper, please submit an Update/Correction/Removal Request.