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A Design System for RFIC: Challenges and Solutions

By Paolo Miliozzi, Ken Kundert, Koen Lampaert, Pete Good and Mojy Chian


The expansion of the market for portable wireless communication devices has given a tremendous push to the development of a new generation of low-power radio frequency integrated circuit (RFIC) products. In this fast-growing environment where time-to-market constraints force tight schedules, having a good design methodology, innovative computer-aided design (CAD) tools, and a well-integrated design system are key factors to success. In this paper, we describe a design system developed to provide the designer with everything necessary to accurately predict the behavior of RFIC devices, including layout and package parasitic effects. We show how important a well-defined and integrated system is to manufacturing a design that meets specifications at the minimum cost, in the minimum time. A close link between schematic, models, and layout is of paramount importance to ensure the accuracy needed for low-power RF design. We give an overview of the advanced methods and tools currently available for simulation and noise analysis of RF devices. Finally, we show a design example that obtained first-silicon success. Keywords—Design automation, design methodology, design system, device modeling, layout design, layout parasitics, low power, power amplifier, RF integrated circuit design, RF integrated circuit simulation, substrate coupling, substrate noise. I

Year: 2000
DOI identifier: 10.1109/5.888999
OAI identifier: oai:CiteSeerX.psu:
Provided by: CiteSeerX
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