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Optimised Predecessor Data Structures for Internal Memory.

By Naila Rahman, Richard Cole and Rajeev Raman

Abstract

We demonstrate the importance of reducing misses in the translation-lookaside buffer (TLB) for obtaining good performance on modern computer architectures. We focus on data structures for the dynamic predecessor problem: to maintain a set S of keys from a totally ordered universe under insertions, deletions and predecessor queries. We give two general techniques for simultaneously reducing cache and TLB misses: simulating 3-level hierarchical memory algorithms and cache-oblivious algorithms. We give preliminary experimental results which demonstrate that data structures based on these ideas outperform data structures which are based on minimising cache misses alone, namely B-tree variants

Year: 2001
DOI identifier: 10.1007/3-540-44688-5_6
OAI identifier: oai:lra.le.ac.uk:2381/3453
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