Two new hardware architectures are proposed for performing multiplication in GF( p)and GF (2n), which are the most time-consuming operations in many cryptographic applications.The architectures provide very fast and efficient execution of multiplication in both GF( p) and GF(2n), and can be mainly used in elliptic curve cryptography. Both architectures are scalable and therefore can handle operands of any size. They can be configured to the available area and/or desired performance. The algorithm implemented in the architectures is the Montgomery multiplication algorithm which proved to be very efficient in both fields. The first architecture utilises a precomputation technique that reduces the critical path delay at the expense of using extra logic, which has a limited negative impact on the silicon area for operand precisions of cryptographic interest. The second architecture computes multiplication faster in GF(2n) than GF( p), which conforms with the premise of GF(2n) for hardware realisations. Both architectures provide new alternatives that offer faster computation of multiplication and useful features
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