Module Placement for Analog Layout using the Sequence-Pair Representation

Abstract

This paper addresses the problem of device-level placement for analog layout. Dierent from most of the existent ap-proaches employing basically simulated annealing optimiza-tion algorithms operating on at Gellat-Jepsen spatial repre-sentations [2], we are using a more recent topological repre-sentation called sequence-pair [7], which has the advantage of not being restricted to slicing oorplan topologies. In this paper, we are explaining how specic features essential to analog placement, as the ability to deal with symmetry and device matching constraints, can be easily handled by employing the sequence-pair representation. Several ana-log examples substantiate the eectiveness of our placement tool, which is already in use in an industrial environment.