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Low noise FSCL digital circuits for decimation filter

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Graduation date: 1994A new circuit technique called Folded Source Coupled Logic (FSCL) has been developed\ud to implement the digital section of mixed-signal IC applications. This FSCL circuit technique\ud offers the advantage of low overlap current spikes during the switching transitions\ud of conventional CMOS gates. This overlap current spike has become one of the major\ud obstacles in improving the accuracy and performance of mixed-signal IC applications.\ud Using simple circuits, FSCL logic family can be interfaced with the existing CMOS family.\ud Thus it can nearly eliminate the power noise issue in the mixed-signal IC design.\ud In this thesis, design of a sinc3 decimation filter using the FSCL technique for a 2nd order\ud delta-sigma modulator has been presented. Simulation results show that this particular\ud decimation filter, using the newly developed FSCL technique, improves the performance\ud of the mixed-signal system

Year: 1993
OAI identifier: oai:ir.library.oregonstate.edu:1957/36625
Provided by: ScholarsArchive@OSU
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